<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Apr 26, 2012, at 3:53 PM, Andrew Trick <<a href="mailto:atrick@apple.com">atrick@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><meta http-equiv="Content-Type" content="text/html charset=iso-8859-1"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Apr 26, 2012, at 3:45 PM, Craig Topper <<a href="mailto:craig.topper@gmail.com">craig.topper@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div class="gmail_extra">I don't have access to an AVX machine. I was hoping maybe there was one in the build bots as I was afraid of this. Do you want to revert or let me fix it later tonight?<br></div></blockquote><div><br></div><div>I imagine you just need to add the right -mcpu option to the tests. You could fix it speculatively based on the list I've given, and if it still passes on non-avx then it should do the same thing on avx.</div></div></div></blockquote><div><br></div><div>Craig fixed all except the ExecutionEngine tests. Anyone have an idea how to silence those on an AVX machine?</div><div><br></div><div><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><blockquote type="cite"><div class="gmail_extra"><div class="gmail_quote"><blockquote class="gmail_quote" style="margin: 0px 0px 0px 0.8ex; border-left-width: 1px; border-left-color: rgb(204, 204, 204); border-left-style: solid; padding-left: 1ex; position: static; z-index: auto; ">LLVM :: ExecutionEngine/2003-01-04-ArgumentBug.ll<br> LLVM :: ExecutionEngine/test-fp-no-external-funcs.ll<br> LLVM :: ExecutionEngine/test-fp.ll</blockquote></div></div></blockquote></div></blockquote><br></div><div>-Andy</div><br><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div><blockquote type="cite"><div class="gmail_extra"><br><div class="gmail_quote">
On Thu, Apr 26, 2012 at 3:03 PM, Andrew Trick <span dir="ltr"><<a href="mailto:atrick@apple.com" target="_blank">atrick@apple.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin: 0px 0px 0px 0.8ex; border-left-width: 1px; border-left-color: rgb(204, 204, 204); border-left-style: solid; padding-left: 1ex; position: static; z-index: auto; ">
<div class="HOEnZb"><div class="h5"><br>
On Apr 25, 2012, at 11:40 PM, Craig Topper <<a href="mailto:craig.topper@gmail.com">craig.topper@gmail.com</a>> wrote:<br>
<br>
> Author: ctopper<br>
> Date: Thu Apr 26 01:40:15 2012<br>
> New Revision: 155618<br>
><br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=155618&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=155618&view=rev</a><br>
> Log:<br>
> Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei7-avx, core-avx-i, and core-avx2 cpu names.<br>
><br>
> Modified:<br>
> llvm/trunk/lib/Target/X86/X86.td<br>
> llvm/trunk/lib/Target/X86/X86Subtarget.cpp<br>
><br>
> Modified: llvm/trunk/lib/Target/X86/X86.td<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=155618&r1=155617&r2=155618&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=155618&r1=155617&r2=155618&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/X86/X86.td (original)<br>
> +++ llvm/trunk/lib/Target/X86/X86.td Thu Apr 26 01:40:15 2012<br>
> @@ -173,21 +173,19 @@<br>
> // Sandy Bridge<br>
> // SSE is not listed here since llvm treats AVX as a reimplementation of SSE,<br>
> // rather than a superset.<br>
> -// FIXME: Disabling AVX for now since it's not ready.<br>
> -def : Proc<"corei7-avx", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT,<br>
> +def : Proc<"corei7-avx", [FeatureAVX, FeatureCMPXCHG16B, FeaturePOPCNT,<br>
> FeatureAES, FeatureCLMUL]>;<br>
> // Ivy Bridge<br>
> -def : Proc<"core-avx-i", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT,<br>
> +def : Proc<"core-avx-i", [FeatureAVX, FeatureCMPXCHG16B, FeaturePOPCNT,<br>
> FeatureAES, FeatureCLMUL,<br>
> FeatureRDRAND, FeatureF16C, FeatureFSGSBase]>;<br>
><br>
> // Haswell<br>
> -// FIXME: Disabling AVX/AVX2/FMA3 for now since it's not ready.<br>
> -def : Proc<"core-avx2", [FeatureSSE42, FeatureCMPXCHG16B, FeaturePOPCNT,<br>
> +def : Proc<"core-avx2", [FeatureAVX2, FeatureCMPXCHG16B, FeaturePOPCNT,<br>
> FeatureAES, FeatureCLMUL, FeatureRDRAND,<br>
> FeatureF16C, FeatureFSGSBase,<br>
> FeatureMOVBE, FeatureLZCNT, FeatureBMI,<br>
> - FeatureBMI2]>;<br>
> + FeatureBMI2, FeatureFMA3]>;<br>
><br>
> def : Proc<"k6", [FeatureMMX]>;<br>
> def : Proc<"k6-2", [Feature3DNow]>;<br>
><br>
> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=155618&r1=155617&r2=155618&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=155618&r1=155617&r2=155618&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)<br>
> +++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Thu Apr 26 01:40:15 2012<br>
> @@ -196,8 +196,7 @@<br>
> if ((ECX >> 9) & 1) { X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3);}<br>
> if ((ECX >> 19) & 1) { X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);}<br>
> if ((ECX >> 20) & 1) { X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);}<br>
> - // FIXME: AVX codegen support is not ready.<br>
> - //if ((ECX >> 28) & 1) { X86SSELevel = AVX; ToggleFeature(X86::FeatureAVX); }<br>
> + if ((ECX >> 28) & 1) { X86SSELevel = AVX; ToggleFeature(X86::FeatureAVX); }<br>
><br>
> bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;<br>
> bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;<br>
> @@ -299,11 +298,10 @@<br>
> HasBMI = true;<br>
> ToggleFeature(X86::FeatureBMI);<br>
> }<br>
> - // FIXME: AVX2 codegen support is not ready.<br>
> - //if ((EBX >> 5) & 0x1) {<br>
> - // X86SSELevel = AVX2;<br>
> - // ToggleFeature(X86::FeatureAVX2);<br>
> - //}<br>
> + if ((EBX >> 5) & 0x1) {<br>
> + X86SSELevel = AVX2;<br>
> + ToggleFeature(X86::FeatureAVX2);<br>
> + }<br>
> if ((EBX >> 8) & 0x1) {<br>
> HasBMI2 = true;<br>
> ToggleFeature(X86::FeatureBMI2);<br>
<br>
<br>
</div></div>Craig,<br>
<br>
Did you run make check on an AVX machine? I think you need to fix a bunch of lit tests before you can make this change...<br>
<br>
Failing Tests (34):<br>
LLVM :: CodeGen/X86/2006-05-11-InstrSched.ll<br>
LLVM :: CodeGen/X86/2009-02-26-MachineLICMBug.ll<br>
LLVM :: CodeGen/X86/2011-12-15-vec_shift.ll<br>
LLVM :: CodeGen/X86/break-sse-dep.ll<br>
LLVM :: CodeGen/X86/gather-addresses.ll<br>
LLVM :: CodeGen/X86/illegal-vector-args-return.ll<br>
LLVM :: CodeGen/X86/lsr-reuse-trunc.ll<br>
LLVM :: CodeGen/X86/pmul.ll<br>
LLVM :: CodeGen/X86/sink-hoist.ll<br>
LLVM :: CodeGen/X86/splat-scalar-load.ll<br>
LLVM :: CodeGen/X86/sse-align-12.ll<br>
LLVM :: CodeGen/X86/sse-domains.ll<br>
LLVM :: CodeGen/X86/sse-minmax.ll<br>
LLVM :: CodeGen/X86/sse41.ll<br>
LLVM :: CodeGen/X86/twoaddr-coalesce-2.ll<br>
LLVM :: CodeGen/X86/vec_insert-6.ll<br>
LLVM :: CodeGen/X86/vec_set-3.ll<br>
LLVM :: CodeGen/X86/vec_shuffle-16.ll<br>
LLVM :: CodeGen/X86/vec_shuffle-19.ll<br>
LLVM :: CodeGen/X86/vec_shuffle-27.ll<br>
LLVM :: CodeGen/X86/vec_shuffle-36.ll<br>
LLVM :: CodeGen/X86/vec_shuffle-37.ll<br>
LLVM :: CodeGen/X86/vec_shuffle-39.ll<br>
LLVM :: CodeGen/X86/vec_splat-2.ll<br>
LLVM :: CodeGen/X86/vec_splat-3.ll<br>
LLVM :: CodeGen/X86/vec_splat-4.ll<br>
LLVM :: CodeGen/X86/vec_splat.ll<br>
LLVM :: CodeGen/X86/widen_cast-2.ll<br>
LLVM :: CodeGen/X86/widen_conv-4.ll<br>
LLVM :: CodeGen/X86/widen_extract-1.ll<br>
LLVM :: CodeGen/X86/x86-64-dead-stack-adjust.ll<br>
LLVM :: ExecutionEngine/2003-01-04-ArgumentBug.ll<br>
LLVM :: ExecutionEngine/test-fp-no-external-funcs.ll<br>
LLVM :: ExecutionEngine/test-fp.ll<br>
<br>
-Andy<br>
</blockquote></div><br><br clear="all"><br>-- <br>~Craig<br>
</div>
</blockquote></div><br></div>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits<br></blockquote></div><br></body></html>