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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>Thank you for the review. I’ve removed the trailing whitespaces.<o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>The patches were committed to r154999(AI1_cmp.diff),
r155000(cdp2.diff), r155001(mrrc.diff),<o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>r155002(mrs.diff) and r155004(swp.diff).<o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'><o:p> </o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>Regards,<o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>Silviu<o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'><o:p> </o:p></span></p>
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<p class=MsoNormal><b><span lang=EN-US style='font-size:10.0pt;font-family:
"Tahoma","sans-serif"'>From:</span></b><span lang=EN-US style='font-size:10.0pt;
font-family:"Tahoma","sans-serif"'> Owen Anderson [mailto:resistor@mac.com] <br>
<b>Sent:</b> 17 April 2012 18:21<br>
<b>To:</b> Silviu Baranga<br>
<b>Cc:</b> llvm-commits@cs.uiuc.edu<br>
<b>Subject:</b> Re: [llvm-commits] [patch] Patches for some unpredictable
instructions on ARM<o:p></o:p></span></p>
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<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>These looks fine to be, but please clean up trailing
whitespace before committing.<o:p></o:p></p>
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<p class=MsoNormal><o:p> </o:p></p>
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<p class=MsoNormal>--Owen<o:p></o:p></p>
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<p class=MsoNormal><o:p> </o:p></p>
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<p class=MsoNormal>On Apr 17, 2012, at 9:12 AM, Silviu Baranga <<a
href="mailto:silbar01@arm.com">silbar01@arm.com</a>> wrote:<o:p></o:p></p>
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<p class=MsoNormal><br>
<br>
<o:p></o:p></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>Hi,<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'> <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>Here
are some patches that address the decoding of some unpredictable instructions<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>on
the ARM backend. All patches add regression tests.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'> <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>swp.diff
- The swp/swpb instructions have some corner cases in which they have<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
unpredictable behaviour. The patch adds checks for these cases and<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
regression tests.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>AI1_cmp.diff
- Sets the unpredictable field for all the cmp, tst, teq, cmnz instructions and
adds<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
the unpredictability condition for the register-shifted register form when any
of the<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
register operands are the pc register.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>cdp2.diff
- The CDP2 instruction has no restriction on the coprocessor number parameter,<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
but in the current implementation the instruction is undefined if the value of
the<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
coprocessor number is in {1010, 1011}. To fix this we add a new operand type
for the coprocessor<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
number, which doesn't have that restriction. We replace the coprocessor
operand type in<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
the CDP2 instruction with the new operand.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>mrrc.diff
- The MCRR2/MRRC2 instructions are unpredictable when the coprocessor is in
101X or<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
Rt==Rt2 or Rt==15 or Rt2==15. The patch adds C++ code to handle these cases and
a<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
regression test.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>mrs.diff
- The patch adds the soft fail behavior when disassembling MRS instructions.
There<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
appears to be a collision between the space of unpredictable MRS instructions
and<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
the space of predictable CPS instructions. The workaround for this was to not
set the<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>
16th bit in the unpredictability mask of the MRS instruction. <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'> <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'> <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>Please
review these patches.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'> <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>Thanks,<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>Silviu<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-size:13.5pt;font-family:"Helvetica","sans-serif"'><swp.diff><AI1_cmp.diff><cdp2.diff><mrrc.diff><mrs.diff>_______________________________________________<br>
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style='color:purple'>http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</span></a><o:p></o:p></span></p>
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<p class=MsoNormal><o:p> </o:p></p>
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