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<p class=MsoNormal>Hi,<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>Here are some patches that address the decoding of some unpredictable
instructions<o:p></o:p></p>
<p class=MsoNormal>on the ARM backend. All patches add regression tests. <o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>swp.diff - The swp/swpb instructions have some corner cases
in which they have <o:p></o:p></p>
<p class=MsoNormal>
unpredictable behaviour. The patch adds checks for these cases and <o:p></o:p></p>
<p class=MsoNormal>
regression tests.<o:p></o:p></p>
<p class=MsoNormal>AI1_cmp.diff - Sets the unpredictable field for all the cmp,
tst, teq, cmnz instructions and adds <o:p></o:p></p>
<p class=MsoNormal>
the unpredictability condition for the register-shifted register form when any
of the <o:p></o:p></p>
<p class=MsoNormal>
register operands are the pc register.<o:p></o:p></p>
<p class=MsoNormal>cdp2.diff - The CDP2 instruction has no restriction on the
coprocessor number parameter, <o:p></o:p></p>
<p class=MsoNormal>
but in the current implementation the instruction is undefined if the value of
the <o:p></o:p></p>
<p class=MsoNormal>
coprocessor number is in {1010, 1011}. To fix this we add a new operand type
for the coprocessor <o:p></o:p></p>
<p class=MsoNormal>
number, which doesn't have that restriction. We replace the coprocessor
operand type in <o:p></o:p></p>
<p class=MsoNormal>
the CDP2 instruction with the new operand.<o:p></o:p></p>
<p class=MsoNormal>mrrc.diff - The MCRR2/MRRC2 instructions are unpredictable
when the coprocessor is in 101X or <o:p></o:p></p>
<p class=MsoNormal>
Rt==Rt2 or Rt==15 or Rt2==15. The patch adds C++ code to handle these cases and
a <o:p></o:p></p>
<p class=MsoNormal>
regression test.<o:p></o:p></p>
<p class=MsoNormal>mrs.diff - The patch adds the soft fail behavior when
disassembling MRS instructions. There <o:p></o:p></p>
<p class=MsoNormal>
appears to be a collision between the space of unpredictable MRS instructions
and <o:p></o:p></p>
<p class=MsoNormal>
the space of predictable CPS instructions. The workaround for this was to not set
the <o:p></o:p></p>
<p class=MsoNormal>
16th bit in the unpredictability mask of the MRS instruction. <o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>Please review these patches.<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>Thanks,<o:p></o:p></p>
<p class=MsoNormal>Silviu<o:p></o:p></p>
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