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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple style='word-wrap: break-word;-webkit-nbsp-mode: space;-webkit-line-break: after-white-space'><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Hi Jacob, <o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Hope this clarifies, see below<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> Jakob Stoklund Olesen [mailto:stoklund@2pi.dk] <br><b>Sent:</b> Tuesday, January 24, 2012 10:48 AM<br><b>To:</b> Chad Rosier<br><b>Cc:</b> Zino Benaissa; rajav@codeaurora.org; llvm-commits@cs.uiuc.edu<br><b>Subject:</b> Re: [llvm-commits] Tuning LLVM Greedy Register Allocator to optimize for code size when targeting ARM Thumb 2 instruction set<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><o:p> </o:p></p><div><div><p class=MsoNormal>On Jan 24, 2012, at 10:25 AM, Chad Rosier wrote:<o:p></o:p></p></div><p class=MsoNormal><br><br><o:p></o:p></p><div><div><div><div><p class=MsoNormal>On Jan 23, 2012, at 9:46 PM, Zino Benaissa wrote:<o:p></o:p></p></div><p class=MsoNormal><br><br><o:p></o:p></p><p class=MsoNormal><span class=apple-style-span><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b></span><span class=apple-style-span><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> Jakob Stoklund Olesen [mailto:stoklund@2pi.dk] </span></span><span class=apple-style-span>If you don't mind, I would like you to run a couple of experiments to better understand why this change improves some benchmarks.<o:p></o:p></span></p><div><div><div><div><p class=MsoNormal><span style='color:#1F497D'> </span><o:p></o:p></p></div><div><p class=MsoNormal><span style='font-size:11.0pt;font-family:Wingdings;color:#1F497D'>Ų</span><span style='font-size:7.0pt;color:#1F497D'> <span class=apple-converted-space> </span></span><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Sure, please let me know what you find.</span><o:p></o:p></p></div></div></div></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Just to be clear, I believe Jakob was suggesting *you* run the experiments.<o:p></o:p></p></div></div></div></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Oh, sorry if that wasn't clear.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><div><div><div><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><div><div><div><div><p class=MsoNormal>First of all, is the regHasSizeImpact() hook necessary? Do you get significantly different results if you pretend this function always returns 2?<o:p></o:p></p></div></div><div><div><p class=MsoNormal><span style='color:#1F497D'> </span><o:p></o:p></p></div><div><p class=MsoNormal><span style='font-size:11.0pt;font-family:Wingdings;color:#1F497D'>Ų</span><span style='font-size:7.0pt;color:#1F497D'> <span class=apple-converted-space> </span></span><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Fr</span><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>om</span><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'> my experiments, precision is quite important to maximize code size gains.</span><o:p></o:p></p></div></div></div></div></blockquote></div></div></div></blockquote><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>The thing is, the function is using information that isn't yet available at RA time. For example, you look at <kill> flags, but they will be changed by the post-RA scheduler moving instructions around. You look at load/store offsets, but they are not filled in until PEI runs. You can't really know which instructions can be converted to 2-address form until after RA etc.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>So basically, regHasSizeImpact() returns a guess, it has to.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Another guess that is much faster to compute is '2'.<o:p></o:p></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Yes, this is heuristic by definition it is a guess. The way to look at it is the other way:<o:p></o:p></span></p><p class=MsoListParagraph style='margin-left:38.25pt;text-indent:-.25in;mso-list:l1 level1 lfo4'><![if !supportLists]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><span style='mso-list:Ignore'>1.<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>If the offset of load/store is too large then don’t bother assigning R0-7<o:p></o:p></span></p><p class=MsoListParagraph style='margin-left:38.25pt;text-indent:-.25in;mso-list:l1 level1 lfo4'><![if !supportLists]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><span style='mso-list:Ignore'>2.<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>If both operands of ADD are not kill then don’t bother assigning R0-7 <o:p></o:p></span></p><p class=MsoListParagraph style='margin-left:38.25pt;text-indent:-.25in;mso-list:l1 level1 lfo4'><![if !supportLists]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><span style='mso-list:Ignore'>3.<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>If immediate of ADD is too large don’t bother assigning R0-7<o:p></o:p></span></p><p class=MsoListParagraph style='margin-left:38.25pt'><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>…<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>The goal is to eliminate as much as possible candidates that compete for R0-R7 so that the RA does a better assignment of R0-R7 (which ultimately increases 16-bits encoding).<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'> <o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Returning 2 fails to do this. You may as well return 0 instead of 2 </span><span style='font-size:11.0pt;font-family:Wingdings;color:#1F497D'>J</span><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>…<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoListParagraph style='text-indent:-.25in;mso-list:l0 level1 lfo3'><![if !supportLists]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><span style='mso-list:Ignore'>1.<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>“</span>you look at <kill> flags, but they will be changed by the post-RA scheduler moving instructions around” the majority of the cases Destination operand will reuse the register of Source 1 operand leading to a 16- bit encoding.<span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p></o:p></span></p><p class=MsoListParagraph style='text-indent:-.25in;mso-list:l0 level1 lfo3'><![if !supportLists]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><span style='mso-list:Ignore'>2.<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>“</span>You look at load/store offsets, but they are not filled in until PEI runs” Is it? What <span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p></o:p></span></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>I want to know which guess is better, because if there is only a small difference, we can leave out a lot of code and save compile time.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>/jakob<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div></div></div></body></html>