diff --git a/include/llvm/MC/MCExpr.h b/include/llvm/MC/MCExpr.h
index 6f156b2..dc0670b 100644
--- a/include/llvm/MC/MCExpr.h
+++ b/include/llvm/MC/MCExpr.h
@@ -162,6 +162,7 @@ public:
     VK_TPOFF,
     VK_DTPOFF,
     VK_TLVP,      // Mach-O thread local variable relocation
+    VK_SECREL,
     // FIXME: We'd really like to use the generic Kinds listed above for these.
     VK_ARM_PLT,   // ARM-style PLT references. i.e., (PLT) instead of @PLT
     VK_ARM_TLSGD, //   ditto for TLSGD, GOT, GOTOFF, TPOFF and GOTTPOFF
diff --git a/include/llvm/MC/MCObjectFileInfo.h b/include/llvm/MC/MCObjectFileInfo.h
index d91b11b..254f8b5 100644
--- a/include/llvm/MC/MCObjectFileInfo.h
+++ b/include/llvm/MC/MCObjectFileInfo.h
@@ -113,7 +113,7 @@ protected:
   const MCSection *TLSExtraDataSection;
   
   /// TLSDataSection - Section directive for Thread Local data.
-  /// ELF and MachO only.
+  /// ELF, MachO and COFF.
   const MCSection *TLSDataSection;        // Defaults to ".tdata".
 
   /// TLSBSSSection - Section directive for Thread Local uninitialized data.
diff --git a/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index a6999f6..f2f5492 100644
--- a/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -562,6 +562,11 @@ getCOFFSectionFlags(SectionKind K) {
       COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA |
       COFF::IMAGE_SCN_MEM_READ |
       COFF::IMAGE_SCN_MEM_WRITE;
+  else if (K.isThreadLocal())
+    Flags |=
+      COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
+      COFF::IMAGE_SCN_MEM_READ |
+      COFF::IMAGE_SCN_MEM_WRITE;
   else if (K.isReadOnly())
     Flags |=
       COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
@@ -588,6 +593,8 @@ static const char *getCOFFSectionPrefixForUniqueGlobal(SectionKind Kind) {
     return ".text$";
   if (Kind.isBSS ())
     return ".bss$";
+  if (Kind.isThreadLocal())
+    return ".tls$";
   if (Kind.isWriteable())
     return ".data$";
   return ".rdata$";
@@ -597,7 +604,6 @@ static const char *getCOFFSectionPrefixForUniqueGlobal(SectionKind Kind) {
 const MCSection *TargetLoweringObjectFileCOFF::
 SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
                        Mangler *Mang, const TargetMachine &TM) const {
-  assert(!Kind.isThreadLocal() && "Doesn't support TLS");
 
   // If this global is linkonce/weak and the target handles this by emitting it
   // into a 'uniqued' section name, create and return the section now.
@@ -618,6 +624,9 @@ SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
   if (Kind.isText())
     return getTextSection();
 
+  if (Kind.isThreadLocal())
+    return getTLSDataSection();
+
   return getDataSection();
 }
 
diff --git a/lib/MC/MCExpr.cpp b/lib/MC/MCExpr.cpp
index 455c03d..d884743 100644
--- a/lib/MC/MCExpr.cpp
+++ b/lib/MC/MCExpr.cpp
@@ -187,6 +187,7 @@ StringRef MCSymbolRefExpr::getVariantKindName(VariantKind Kind) {
   case VK_TPOFF: return "TPOFF";
   case VK_DTPOFF: return "DTPOFF";
   case VK_TLVP: return "TLVP";
+  case VK_SECREL: return "SECREL";
   case VK_ARM_PLT: return "(PLT)";
   case VK_ARM_GOT: return "(GOT)";
   case VK_ARM_GOTOFF: return "(GOTOFF)";
diff --git a/lib/MC/MCObjectFileInfo.cpp b/lib/MC/MCObjectFileInfo.cpp
index 32ba924..54d0de4 100644
--- a/lib/MC/MCObjectFileInfo.cpp
+++ b/lib/MC/MCObjectFileInfo.cpp
@@ -501,6 +501,12 @@ void MCObjectFileInfo::InitCOFFMCObjectFileInfo(Triple T) {
                         COFF::IMAGE_SCN_MEM_READ |
                         COFF::IMAGE_SCN_MEM_WRITE,
                         SectionKind::getDataRel());
+  TLSDataSection =
+    Ctx->getCOFFSection(".tls$",
+                        COFF::IMAGE_SCN_CNT_INITIALIZED_DATA |
+                        COFF::IMAGE_SCN_MEM_READ |
+                        COFF::IMAGE_SCN_MEM_WRITE,
+                        SectionKind::getDataRel());
 }
 
 void MCObjectFileInfo::InitMCObjectFileInfo(StringRef TT, Reloc::Model relocm,
diff --git a/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
index c5092be..c916a0f 100644
--- a/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ b/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -164,7 +164,13 @@ namespace X86II {
     /// is some TLS offset from the picbase.
     ///
     /// This is the 32-bit TLS offset for Darwin TLS in PIC mode.
-    MO_TLVP_PIC_BASE
+    MO_TLVP_PIC_BASE,
+
+    /// MO_SECREL - On a symbol operand this indicates that the immediate is
+    /// the offset from beginning of section.
+    ///
+    /// This is the TLS offset for the COFF/Windows TLS mechanism.
+    MO_SECREL
   };
 
   enum {
diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 93ce64b..47c1cf8 100644
--- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -222,6 +222,7 @@ EmitImmediate(const MCOperand &DispOp, unsigned Size, MCFixupKind FixupKind,
 
   // If we have an immoffset, add it to the expression.
   if ((FixupKind == FK_Data_4 ||
+       FixupKind == FK_Data_8 ||
        FixupKind == MCFixupKind(X86::reloc_signed_4byte))) {
     GlobalOffsetTableExprKind Kind = StartsWithGlobalOffsetTable(Expr);
     if (Kind != GOT_None) {
@@ -231,6 +232,12 @@ EmitImmediate(const MCOperand &DispOp, unsigned Size, MCFixupKind FixupKind,
       if (Kind == GOT_Normal)
         ImmOffset = CurByte;
     }
+    else if (Expr->getKind() == MCExpr::SymbolRef) {
+      const MCSymbolRefExpr *Ref = static_cast<const MCSymbolRefExpr*>(Expr);
+      if (Ref->getKind() == MCSymbolRefExpr::VK_SECREL) {
+        FixupKind = MCFixupKind(FK_SecRel_4);
+      }
+    }
   }
 
   // If the fixup is pc-relative, we need to bias the value to be relative to
diff --git a/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp b/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
index a337aaa..bc272ef 100644
--- a/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
@@ -52,7 +52,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(unsigned FixupKind) const {
       return COFF::IMAGE_REL_AMD64_ADDR64;
     llvm_unreachable("unsupported relocation type");
   case FK_SecRel_4:
-    return Is64Bit ? COFF::IMAGE_REL_AMD64_SREL32 : COFF::IMAGE_REL_I386_SECREL;
+    return Is64Bit ? COFF::IMAGE_REL_AMD64_SECREL : COFF::IMAGE_REL_I386_SECREL;
   default:
     llvm_unreachable("unsupported relocation type");
   }
diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index 4c3ff02..ed2bad1 100644
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -199,6 +199,7 @@ void X86AsmPrinter::printSymbolOperand(const MachineOperand &MO,
   case X86II::MO_TLVP_PIC_BASE:
     O << "@TLVP" << '-' << *MF->getPICBaseSymbol();
     break;
+  case X86II::MO_SECREL:      O << "@SECREL";      break;
   }
 }
 
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index dc1fd7f..fb3ea17 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -7417,6 +7417,67 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
     unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX;
     return DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy(),
                               Chain.getValue(1));
+  } else if (Subtarget->isTargetWindows()) {
+    // Just use the implicit TLS architecture
+    // Need to generate someting similar to:
+    //   mov     rdx, qword [gs:abs 58H]; Load pointer to ThreadLocalStorage
+    //                                  ; from TEB
+    //   mov     ecx, dword [rel _tls_index]: Load index (from C runtime)
+    //   mov     rcx, qword [rdx+rcx*8]
+    //   mov     eax, .tls$:tlsvar
+    //   [rax+rcx] contains the address
+    // Windows 64bit: gs:0x58
+    // Windows 32bit: fs:__tls_array
+
+    // If GV is an alias then use the aliasee for determining
+    // thread-localness.
+    if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
+      GV = GA->resolveAliasedGlobal(false);
+    DebugLoc dl = GA->getDebugLoc();
+   SDValue Chain = DAG.getEntryNode();
+
+   // Get the Thread Pointer, which is %fs:__tls_array (32-bit) or
+   // %gs:0x58 (64-bit).
+   Value *Ptr = Constant::getNullValue(Subtarget->is64Bit()
+                                       ? Type::getInt8PtrTy(*DAG.getContext(),
+                                                            256)
+                                       : Type::getInt32PtrTy(*DAG.getContext(),
+                                                             257));
+
+   SDValue ThreadPointer = DAG.getLoad(getPointerTy(), dl, Chain,
+                                       Subtarget->is64Bit()
+                                       ? DAG.getIntPtrConstant(0x58)
+                                       : DAG.getExternalSymbol("_tls_array",
+                                                               getPointerTy()),
+                                       MachinePointerInfo(Ptr),
+                                       false, false, false, 0);
+
+   // Load the _tls_index variable
+   SDValue IDX = DAG.getExternalSymbol("_tls_index", getPointerTy());
+   if (Subtarget->is64Bit())
+       IDX = DAG.getExtLoad(ISD::ZEXTLOAD, dl, getPointerTy(), Chain,
+                            IDX, MachinePointerInfo(), MVT::i32,
+                            false, false, 0);
+   else
+       IDX = DAG.getLoad(getPointerTy(), dl, Chain, IDX, MachinePointerInfo(),
+                         false, false, false, 0);
+
+   SDValue Scale = DAG.getConstant(Log2_64_Ceil(TD->getPointerSize()), getPointerTy());
+   IDX = DAG.getNode(ISD::SHL, dl, getPointerTy(), IDX, Scale);
+
+   SDValue res = DAG.getNode(ISD::ADD, dl, getPointerTy(), ThreadPointer, IDX);
+   res = DAG.getLoad(getPointerTy(), dl, Chain, res, MachinePointerInfo(),
+                     false, false, false, 0);
+
+   // Get the offset of start of .tls section
+   SDValue TGA = DAG.getTargetGlobalAddress(GA->getGlobal(), dl,
+                                            GA->getValueType(0),
+                                            GA->getOffset(), X86II::MO_SECREL);
+   SDValue Offset = DAG.getNode(X86ISD::Wrapper, dl, getPointerTy(), TGA);
+
+   // The address of the thread local variable is the add of the thread
+   // pointer with the offset of the variable.
+   return DAG.getNode(ISD::ADD, dl, getPointerTy(), res, Offset);
   }
 
   llvm_unreachable("TLS not implemented for this target.");
diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp
index 8955458..f075901 100644
--- a/lib/Target/X86/X86MCInstLower.cpp
+++ b/lib/Target/X86/X86MCInstLower.cpp
@@ -154,6 +154,7 @@ MCOperand X86MCInstLower::LowerSymbolOperand(const MachineOperand &MO,
                                                            Ctx),
                                    Ctx);
     break;
+  case X86II::MO_SECREL:    RefKind = MCSymbolRefExpr::VK_SECREL; break;
   case X86II::MO_TLSGD:     RefKind = MCSymbolRefExpr::VK_TLSGD; break;
   case X86II::MO_GOTTPOFF:  RefKind = MCSymbolRefExpr::VK_GOTTPOFF; break;
   case X86II::MO_INDNTPOFF: RefKind = MCSymbolRefExpr::VK_INDNTPOFF; break;
@@ -230,7 +231,11 @@ static void LowerUnaryToTwoAddr(MCInst &OutMI, unsigned NewOpc) {
 /// a short fixed-register form.
 static void SimplifyShortImmForm(MCInst &Inst, unsigned Opcode) {
   unsigned ImmOp = Inst.getNumOperands() - 1;
-  assert(Inst.getOperand(0).isReg() && Inst.getOperand(ImmOp).isImm() &&
+  assert(Inst.getOperand(0).isReg() &&
+	     (Inst.getOperand(ImmOp).isImm() ||
+		 (Inst.getOperand(ImmOp).isExpr() &&
+		  Inst.getOperand(ImmOp).getExpr()->getKind() == MCExpr::SymbolRef) &&
+		  static_cast<const MCSymbolRefExpr*>(Inst.getOperand(ImmOp).getExpr())->getKind() == MCSymbolRefExpr::VK_SECREL) &&
          ((Inst.getNumOperands() == 3 && Inst.getOperand(1).isReg() &&
            Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg()) ||
           Inst.getNumOperands() == 2) && "Unexpected instruction!");
diff --git a/test/CodeGen/X86/tls1.ll b/test/CodeGen/X86/tls1.ll
index 0cae5c4..d23dd9e 100644
--- a/test/CodeGen/X86/tls1.ll
+++ b/test/CodeGen/X86/tls1.ll
@@ -2,6 +2,13 @@
 ; RUN: grep {movl	%gs:i@NTPOFF, %eax} %t
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movl	%fs:i@TPOFF, %eax} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movl	_tls_index(%rip), %eax} %t3
+; RUN: grep {movabsq	\$i@SECREL, %rcx} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movl	__tls_index, %eax} %t4
+; RUN: grep {movl	%fs:__tls_array, %ecx} %t4
+; RUN: grep {movl	_i@SECREL(%eax), %eax} %t4
 
 @i = thread_local global i32 15
 
diff --git a/test/CodeGen/X86/tls11.ll b/test/CodeGen/X86/tls11.ll
index 514a168..6ef650c 100644
--- a/test/CodeGen/X86/tls11.ll
+++ b/test/CodeGen/X86/tls11.ll
@@ -2,6 +2,15 @@
 ; RUN: grep {movzwl	%gs:i@NTPOFF, %eax} %t
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movzwl	%fs:i@TPOFF, %eax} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movl	_tls_index(%rip), %eax} %t3
+; RUN: grep {movq	%gs:88, %rcx} %t3
+; RUN: grep {movabsq	\$i@SECREL, %rcx} %t3
+; RUN: grep {movzwl	(%rax,%rcx), %eax} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movl	__tls_index, %eax} %t4
+; RUN: grep {movl	%fs:__tls_array, %ecx} %t4
+; RUN: grep {movzwl	_i@SECREL(%eax), %eax} %t4
 
 @i = thread_local global i16 15
 
diff --git a/test/CodeGen/X86/tls12.ll b/test/CodeGen/X86/tls12.ll
index c29f6ad..4bb9920 100644
--- a/test/CodeGen/X86/tls12.ll
+++ b/test/CodeGen/X86/tls12.ll
@@ -2,6 +2,15 @@
 ; RUN: grep {movb	%gs:i@NTPOFF, %al} %t
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movb	%fs:i@TPOFF, %al} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movl	_tls_index(%rip), %eax} %t3
+; RUN: grep {movq	%gs:88, %rcx} %t3
+; RUN: grep {movabsq	\$i@SECREL, %rcx} %t3
+; RUN: grep {movb	(%rax,%rcx), %al} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movl	__tls_index, %eax} %t4
+; RUN: grep {movl	%fs:__tls_array, %ecx} %t4
+; RUN: grep {movb	_i@SECREL(%eax), %al} %t4
 
 @i = thread_local global i8 15
 
diff --git a/test/CodeGen/X86/tls13.ll b/test/CodeGen/X86/tls13.ll
index 08778ec..0cf1b2d 100644
--- a/test/CodeGen/X86/tls13.ll
+++ b/test/CodeGen/X86/tls13.ll
@@ -4,6 +4,14 @@
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movswl	%fs:i@TPOFF, %edi} %t2
 ; RUN: grep {movzwl	%fs:j@TPOFF, %edi} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movabsq	\$i@SECREL, %rax} %t3
+; RUN: grep {movswl	(%rsi,%rax), %ecx} %t3
+; RUN: grep {movabsq	\$j@SECREL, %rax} %t3
+; RUN: grep {movzwl	(%rsi,%rax), %ecx} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movswl	_i@SECREL(%esi), %eax} %t4
+; RUN: grep {movzwl	_j@SECREL(%esi), %eax} %t4
 
 @i = thread_local global i16 0
 @j = thread_local global i16 0
diff --git a/test/CodeGen/X86/tls14.ll b/test/CodeGen/X86/tls14.ll
index 88426dd..68888e8 100644
--- a/test/CodeGen/X86/tls14.ll
+++ b/test/CodeGen/X86/tls14.ll
@@ -4,6 +4,14 @@
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movsbl	%fs:i@TPOFF, %edi} %t2
 ; RUN: grep {movzbl	%fs:j@TPOFF, %edi} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movabsq	\$i@SECREL, %rax} %t3
+; RUN: grep {movsbl	(%rsi,%rax), %ecx} %t3
+; RUN: grep {movabsq	\$j@SECREL, %rax} %t3
+; RUN: grep {movzbl	(%rsi,%rax), %ecx} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movsbl	_i@SECREL(%esi), %eax} %t4
+; RUN: grep {movzbl	_j@SECREL(%esi), %eax} %t4
 
 @i = thread_local global i8 0
 @j = thread_local global i8 0
diff --git a/test/CodeGen/X86/tls2.ll b/test/CodeGen/X86/tls2.ll
index 5a94296..37795c9 100644
--- a/test/CodeGen/X86/tls2.ll
+++ b/test/CodeGen/X86/tls2.ll
@@ -4,6 +4,14 @@
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movq	%fs:0, %rax} %t2
 ; RUN: grep {leaq	i@TPOFF(%rax), %rax} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movl	_tls_index(%rip), %eax} %t3
+; RUN: grep {movq	%gs:88, %rcx} %t3
+; RUN: grep {addq	\$i@SECREL, %rax} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movl	__tls_index, %eax} %t4
+; RUN: grep {movl	%fs:__tls_array, %ecx} %t4
+; RUN: grep {leal	_i@SECREL(%eax), %eax} %t4
 
 @i = thread_local global i32 15
 
diff --git a/test/CodeGen/X86/tls3.ll b/test/CodeGen/X86/tls3.ll
index 7327cc4..f424664 100644
--- a/test/CodeGen/X86/tls3.ll
+++ b/test/CodeGen/X86/tls3.ll
@@ -4,6 +4,13 @@
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movq	i@GOTTPOFF(%rip), %rax} %t2
 ; RUN: grep {movl	%fs:(%rax), %eax} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movl	_tls_index(%rip), %eax} %t3
+; RUN: grep {movabsq	\$i@SECREL, %rcx} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movl	__tls_index, %eax} %t4
+; RUN: grep {movl	%fs:__tls_array, %ecx} %t4
+; RUN: grep {movl	_i@SECREL(%eax), %eax} %t4
 
 @i = external thread_local global i32		; <i32*> [#uses=2]
 
diff --git a/test/CodeGen/X86/tls4.ll b/test/CodeGen/X86/tls4.ll
index d2e40e3..ddb99c9 100644
--- a/test/CodeGen/X86/tls4.ll
+++ b/test/CodeGen/X86/tls4.ll
@@ -4,6 +4,14 @@
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movq	%fs:0, %rax} %t2
 ; RUN: grep {addq	i@GOTTPOFF(%rip), %rax} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movl	_tls_index(%rip), %eax} %t3
+; RUN: grep {movq	%gs:88, %rcx} %t3
+; RUN: grep {addq	\$i@SECREL, %rax} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movl	__tls_index, %eax} %t4
+; RUN: grep {movl	%fs:__tls_array, %ecx} %t4
+; RUN: grep {leal	_i@SECREL(%eax), %eax} %t4
 
 @i = external thread_local global i32		; <i32*> [#uses=2]
 
diff --git a/test/CodeGen/X86/tls5.ll b/test/CodeGen/X86/tls5.ll
index 4d2cc02..0fa156a 100644
--- a/test/CodeGen/X86/tls5.ll
+++ b/test/CodeGen/X86/tls5.ll
@@ -2,6 +2,13 @@
 ; RUN: grep {movl	%gs:i@NTPOFF, %eax} %t
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movl	%fs:i@TPOFF, %eax} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movl	_tls_index(%rip), %eax} %t3
+; RUN: grep {movabsq	\$i@SECREL, %rcx} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movl	__tls_index, %eax} %t4
+; RUN: grep {movl	%fs:__tls_array, %ecx} %t4
+; RUN: grep {movl	_i@SECREL(%eax), %eax} %t4
 
 @i = internal thread_local global i32 15
 
diff --git a/test/CodeGen/X86/tls6.ll b/test/CodeGen/X86/tls6.ll
index 505106e..33e8647 100644
--- a/test/CodeGen/X86/tls6.ll
+++ b/test/CodeGen/X86/tls6.ll
@@ -4,6 +4,14 @@
 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2
 ; RUN: grep {movq	%fs:0, %rax} %t2
 ; RUN: grep {leaq	i@TPOFF(%rax), %rax} %t2
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 > %t3
+; RUN: grep {movl	_tls_index(%rip), %eax} %t3
+; RUN: grep {movq	%gs:88, %rcx} %t3
+; RUN: grep {addq	\$i@SECREL, %rax} %t3
+; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 > %t4
+; RUN: grep {movl	__tls_index, %eax} %t4
+; RUN: grep {movl	%fs:__tls_array, %ecx} %t4
+; RUN: grep {leal	_i@SECREL(%eax), %eax} %t4
 
 @i = internal thread_local global i32 15
 
