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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Well, if it would be possible to change LLVM intrinsic prototype – then you’re right, no instruction combining were required.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">However until this will be done in LLVM spec – the optimization is in place.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Chandler Carruth [mailto:chandlerc@google.com]
<br>
<b>Sent:</b> Thursday, January 05, 2012 11:45<br>
<b>To:</b> Umansky, Victor<br>
<b>Cc:</b> Rotem, Nadav; Evan Cheng; llvm-commits@cs.uiuc.edu<br>
<b>Subject:</b> Re: [llvm-commits] x86 branch sequence optimization in LLVM code gen: please review<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Thu, Jan 5, 2012 at 1:24 AM, Umansky, Victor <<a href="mailto:victor.umansky@intel.com">victor.umansky@intel.com</a>> wrote:<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Answering Chandler’s questions:</span><o:p></o:p></p>
<p><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">1.</span><span style="font-size:7.0pt;color:#1F497D">
</span><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">An 86 intrinsic prototype is defined by Intel together with the corresponding instruction, published in IA32 arch spec and in *intrin.h files. Consequently this prototype
is accepted by all compiler providers – for compatibility reasons. The ptest* intrinsics return i32 type.</span><o:p></o:p></p>
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<p class="MsoNormal">I don't think we're talking about the same thing. There are two things called intrinsics here, and they're getting improperly conflated.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">1) Intel (and other vendors) provide C intrinsics for accessing particular functionality in *intrin.h header files. This include _mm_testz_si128, and all kinds of others. They are *C* functions provided and implemented as part of the *C*
compiler though. That's important.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">2) LLVM defines LLVM intrinsic functions as part of the LLVM IR: <a href="http://llvm.org/docs/LangRef.html#intrinsics">http://llvm.org/docs/LangRef.html#intrinsics</a> and include/llvm/IntrinsicsX86.td are relevant for these. These are
*not* C functions, and they cannot be called from C code directly. They are not a publicly visible interface.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Frontends such as Clang implement #1 by (roughly) emitting code which uses the intrinsics defined in #2.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Currently LLVM (#2) has intrinsics for PTEST which return an 'i32' even though the semantics of that instruction are best described by returning an 'i1' which can then directly be used in a 'br' instruction or a 'select' instruction. I'm
suggesting changing *LLVM*'s intrinsic (#2) to return an 'i1'.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">The frontend can then emit any adaptive logic necessary when lowering the interface of #1 (which remains the same, returning 'int') to code using LLVM's newly adapted intrinsics. Even if this requires "extra" or "redundant" IR, this should
be optimized away *at the IR* level to preserve the generality of those optimizations, and because frankly optimizations on the IR are much easier to implement and maintain.<o:p></o:p></p>
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