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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Answering Chandler’s questions:<o:p></o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><span style="mso-list:Ignore">1.<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span dir="LTR"></span><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">An 86 intrinsic prototype is defined by Intel together with the corresponding instruction, published in IA32 arch spec and
in *intrin.h files. Consequently this prototype is accepted by all compiler providers – for compatibility reasons. The ptest* intrinsics return i32 type.<o:p></o:p></span></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><span style="mso-list:Ignore">2.<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span dir="LTR"></span><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Of course, ptest-branch combining won’t catch the cases of ptest-select or ptest-cmove. However adding these cases would require
very few changes in the code.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Victor<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Chandler Carruth [mailto:chandlerc@google.com]
<br>
<b>Sent:</b> Thursday, January 05, 2012 11:16<br>
<b>To:</b> Umansky, Victor<br>
<b>Cc:</b> Rotem, Nadav; Evan Cheng; llvm-commits@cs.uiuc.edu<br>
<b>Subject:</b> Re: [llvm-commits] x86 branch sequence optimization in LLVM code gen: please review<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Thu, Jan 5, 2012 at 12:18 AM, Umansky, Victor <<a href="mailto:victor.umansky@intel.com">victor.umansky@intel.com</a>> wrote:<o:p></o:p></p>
<p class="MsoNormal">Nadav,<br>
<br>
The redundant sequence (that which is optimized by this patch) is generated not due to PTEST instruction, but due to ptest* intrinsic functions - whose API is defined as int32 by Intel.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">I see that you've already committed this, but it still isn't clear to me why we can't do something closer to Nadav's suggestion won't work.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Specifically, why do the LLVM intrinsics have to return an i32? No one is ever able to directly call LLVM intrinsics. We can give them any API that is useful. If this instruction really sets a flag rather than returning a value, returning
an 'i1' type in the LLVM IR would be much more accurate.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">The frontend can then manage the lowering from whatever C API is used in the library to the LLVM IR, and the IR optimizers can clean up any redundancies that are there.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">The reason this is important is that there are many many things which can prevent the pattern you've created a peephole optimization for from actually occurring. If we change something in the rest of the LLVM stack that slightly alters
the pattern coming out of the middle-end optimizers, this optimization vanishes. By making the semantics of the instruction more closely modeled by IR (and the resulting DAG), the optimization pipeline will be much cleaner.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">One example that jumps to mind is what if the icmp in your example ends up feeding into a select rather than a branch. Does your peephole still fire? Do we end up with ptest + cmov?<o:p></o:p></p>
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