<html><head></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Jan 2, 2012, at 12:25 AM, Craig Topper wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite">The instruction selection patterns are not ordered correctly to prefer AVX version of instructions over SSE versions. So until the patterns are properly ordered or we make the HasSSE functions specifically check that AVX is not enabled we can't change the code in X86Subtarget.<br></blockquote><div><br></div>Right. That's why the hack is in X86Subtarget.cpp. I agree with you that the right fix is to change HasSSE predicate to HasSSE && !HasAVX except for instructions which do not have separate AVX variants.</div><div><br></div><div>Evan</div><div><br></div><div><br><blockquote type="cite">
<br><div class="gmail_quote">On Mon, Jan 2, 2012 at 12:18 AM, Demikhovsky, Elena <span dir="ltr"><<a href="mailto:elena.demikhovsky@intel.com">elena.demikhovsky@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">I think that “HasAVX” should always cover “HasSSE42” and “HasSSE42orAVX” is redundant in this case.<u></u><u></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">And “HasAVX2” will cover “HasAVX”.<u></u><u></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">I propose to change in X86Subtarget constructor from:<u></u><u></u></span></p><p class="MsoNormal" style="text-autospace:none"><span style="font-family:"Courier New"">
<span style="color:blue">if</span> (HasAVX)<u></u><u></u></span></p><p class="MsoNormal" style="text-autospace:none"><span style="font-family:"Courier New""> X86SSELevel = NoMMXSSE;<u></u><u></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">to<u></u><u></u></span></p><p class="MsoNormal" style="text-autospace:none"><span style="font-family:"Courier New"">
<span style="color:blue">if</span> (HasAVX)<u></u><u></u></span></p><p class="MsoNormal" style="text-autospace:none"><span style="font-family:"Courier New""> X86SSELevel = SSE42;<u></u><u></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p><p class="MsoNormal"><b><i><span style="color:teal">- Elena</span></i></b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u><u></u></span></p>
<div style="border:none;border-top:solid #b5c4df 1.0pt;padding:3.0pt 0in 0in 0in"><p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> <a href="mailto:llvm-commits-bounces@cs.uiuc.edu" target="_blank">llvm-commits-bounces@cs.uiuc.edu</a> [mailto:<a href="mailto:llvm-commits-bounces@cs.uiuc.edu" target="_blank">llvm-commits-bounces@cs.uiuc.edu</a>]
<b>On Behalf Of </b>Craig Topper<br>
<b>Sent:</b> Sunday, January 01, 2012 21:56<br>
<b>To:</b> Umansky, Victor<br>
<b>Cc:</b> <a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br>
<b>Subject:</b> Re: [llvm-commits] X86SSELevel for AVX architecture<u></u><u></u></span></p>
</div><div><div class="h5"><p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal" style="margin-bottom:12.0pt">Missed the CRC32 instructions. They have now been fixed in r147411.<u></u><u></u></p>
<div><p class="MsoNormal">On Sun, Jan 1, 2012 at 1:44 PM, Craig Topper <<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>> wrote:<u></u><u></u></p><p class="MsoNormal">Fixed sfence, mfence, lfence, clflush, monitor, and mwait in r147409.<u></u><u></u></p>
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<div><p class="MsoNormal" style="margin-bottom:12.0pt"><u></u> <u></u></p>
<div><p class="MsoNormal">On Sun, Jan 1, 2012 at 1:06 PM, Craig Topper <<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>> wrote:<u></u><u></u></p><p class="MsoNormal" style="margin-bottom:12.0pt">This is similar to the fix for the prefetch instruction in r146163. I think the fence instructions and clflush are similarly broken. I'll see if I can find any others and I'll commit a fix.<u></u><u></u></p>
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<div><p class="MsoNormal">On Sun, Jan 1, 2012 at 10:18 AM, Umansky, Victor <<a href="mailto:victor.umansky@intel.com" target="_blank">victor.umansky@intel.com</a>> wrote:<u></u><u></u></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Hi Evan,<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""> <u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">I noticed that in X86Subtarget constructor you set ‘</span><span style="font-size:10.0pt;font-family:"Courier New"">X86SSELevel’
</span><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">member of the class as ‘</span><span style="font-size:10.0pt;font-family:"Courier New"">NoMMXSSE</span><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">’ in the case
when HasAVX member is set to ‘true’.<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Effectively that invalidates SSE features for AVX architecture - because hasSSEn() accessors return ‘false’ when HasAVXn() is ‘true’.<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">I wonder whether this is the behavior which you’d like to enforce – as conceptually AVX architecture complements SSE rather than replaces it completely.<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""> <u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">I noticed this problem after discovering that LLVM fails to lower “sse2.fence” intrinsic when generating a code for AVX architecture – because this intrinsic is conditioned
on hasSSE2() being ‘true’.<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Is that case was somehow missed from regression testing, or there is another way to lower that intrinsic?<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""> <u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">I’d appreciate your clarifications.<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""> <u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Best Regards,<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""> Victor Umansky<u></u><u></u></span></p>
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<div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""> <u></u><u></u></span></p>
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