Test case added in r146675.<br><br><div class="gmail_quote">On Thu, Dec 15, 2011 at 10:57 AM, Lang Hames <span dir="ltr"><<a href="mailto:lhames@gmail.com">lhames@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Author: lhames<br>
Date: Thu Dec 15 12:57:27 2011<br>
New Revision: 146671<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=146671&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=146671&view=rev</a><br>
Log:<br>
Fix VSELECT operand order. Was previously backwards, causing bogus vector shift results - <rdar://problem/10559581>.<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=146671&r1=146670&r2=146671&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=146671&r1=146670&r2=146671&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 15 12:57:27 2011<br>
@@ -10177,7 +10177,7 @@<br>
M = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,<br>
DAG.getConstant(Intrinsic::x86_sse2_pslli_w, MVT::i32), M,<br>
DAG.getConstant(4, MVT::i32));<br>
- R = DAG.getNode(ISD::VSELECT, dl, VT, Op, R, M);<br>
+ R = DAG.getNode(ISD::VSELECT, dl, VT, Op, M, R);<br>
// a += a<br>
Op = DAG.getNode(ISD::ADD, dl, VT, Op, Op);<br>
<br>
@@ -10192,13 +10192,13 @@<br>
M = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,<br>
DAG.getConstant(Intrinsic::x86_sse2_pslli_w, MVT::i32), M,<br>
DAG.getConstant(2, MVT::i32));<br>
- R = DAG.getNode(ISD::VSELECT, dl, VT, Op, R, M);<br>
+ R = DAG.getNode(ISD::VSELECT, dl, VT, Op, M, R);<br>
// a += a<br>
Op = DAG.getNode(ISD::ADD, dl, VT, Op, Op);<br>
<br>
// return pblendv(r, r+r, a);<br>
R = DAG.getNode(ISD::VSELECT, dl, VT, Op,<br>
- R, DAG.getNode(ISD::ADD, dl, VT, R, R));<br>
+ DAG.getNode(ISD::ADD, dl, VT, R, R), R);<br>
return R;<br>
}<br>
<br>
<br>
<br>
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</blockquote></div><br>