<div class="gmail_quote">On Thu, Oct 27, 2011 at 6:29 PM, Dan Gohman <span dir="ltr"><<a href="mailto:gohman@apple.com">gohman@apple.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;">
Author: djg<br>
Date: Thu Oct 27 20:29:32 2011<br>
New Revision: 143177<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=143177&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=143177&view=rev</a><br>
Log:<br>
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW<br>
on every node as it legalizes them. This makes it easier to use<br>
hasOneUse() heuristics, since unneeded nodes can be removed from the<br>
DAG earlier.<br>
<br>
Make LegalizeOps visit the DAG in an operands-last order. It previously<br>
used operands-first, because LegalizeTypes has to go operands-first, and<br>
LegalizeTypes used to be part of LegalizeOps, but they're now split.<br>
The operands-last order is more natural for several legalization tasks.<br>
For example, it allows lowering code for nodes with floating-point or<br>
vector constants to see those constants directly instead of seeing the<br>
lowered form (often constant-pool loads). This makes some things<br>
somewhat more complicated today, though it ought to allow things to be<br>
simpler in the future. It also fixes some bugs exposed by Legalizing<br>
using RAUW aggressively.<br>
<br>
Remove the part of LegalizeOps that attempted to patch up invalid chain<br>
operands on libcalls generated by LegalizeTypes, since it doesn't work<br>
with the new LegalizeOps traversal order. Instead, define what<br>
LegalizeTypes is doing to be correct, and transfer the responsibility<br>
of keeping calls from having overlapping calling sequences into the<br>
scheduler.<br>
<br>
Teach the scheduler to model callseq_begin/end pairs as having a<br>
physical register definition/use to prevent calls from having<br>
overlapping calling sequences. This is also somewhat complicated, though<br>
there are ways it might be simplified in the future.<br>
<br>
This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.<br>
Please direct high-level questions about this patch to management.<br>
<br>
Removed:<br>
llvm/trunk/test/CodeGen/X86/2009-02-05-CoalescerBug.ll<br>
llvm/trunk/test/CodeGen/X86/dbg-inline.ll<br>
Modified:<br>
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp<br>
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp<br>
llvm/trunk/test/CodeGen/CellSPU/and_ops.ll<br>
llvm/trunk/test/CodeGen/CellSPU/call_indirect.ll<br>
llvm/trunk/test/CodeGen/CellSPU/nand.ll<br>
llvm/trunk/test/CodeGen/CellSPU/or_ops.ll<br>
llvm/trunk/test/CodeGen/CellSPU/select_bits.ll<br>
llvm/trunk/test/CodeGen/CellSPU/struct_1.ll<br>
llvm/trunk/test/CodeGen/Mips/cprestore.ll<br>
llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll<br>
llvm/trunk/test/CodeGen/Thumb/2011-05-11-DAGLegalizer.ll<br>
llvm/trunk/test/CodeGen/X86/sse3.ll<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=143177&r1=143176&r2=143177&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=143177&r1=143176&r2=143177&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Oct 27 20:29:32 2011<br></blockquote><div><br></div><div><snip></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;">
+#if 0<br>
+ SDValue LastChain = DAG.getEntryNode();<br>
+ for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),<br>
+ E = DAG.allnodes_end(); I != E; ++I) {<br>
+ SDNode *N = I;<br>
+ if (N->getOpcode() == ISD::CALLSEQ_START) {<br>
+ SmallVector<SDValue, 4> Ops(N->op_begin(), N->op_end());<br>
+ Ops[0] = LastChain;<br>
+ SDNode *New = DAG.UpdateNodeOperands(N, Ops.data(), Ops.size());<br>
+ assert(New == N && "CALLSEQ_START got CSE'd!");<br>
+ }<br>
+ for (unsigned i = 0, e = N->getNumValues(); i != e; ++i)<br>
+ if (N->getValueType(i) == MVT::Other)<br>
+ LastChain = SDValue(N, i);<br>
}<br>
+#endif<br></blockquote><div><br></div><div>FYI, was leaving this #if 0-ed code intentional?</div></div>