Index: lib/Target/ARM/ARMISelDAGToDAG.cpp
===================================================================
--- lib/Target/ARM/ARMISelDAGToDAG.cpp	(revision 142241)
+++ lib/Target/ARM/ARMISelDAGToDAG.cpp	(working copy)
@@ -2316,7 +2316,6 @@
 SDNode *ARMDAGToDAGISel::SelectABSOp(SDNode *N){
   SDValue XORSrc0 = N->getOperand(0);
   SDValue XORSrc1 = N->getOperand(1);
-  DebugLoc DL = N->getDebugLoc();
   EVT VT = N->getValueType(0);
 
   if (DisableARMIntABS)
Index: lib/Target/ARM/ARMInstrThumb2.td
===================================================================
--- lib/Target/ARM/ARMInstrThumb2.td	(revision 142241)
+++ lib/Target/ARM/ARMInstrThumb2.td	(working copy)
@@ -1345,6 +1345,7 @@
                         "$addr.base = $Rn_wb,@earlyclobber $Rn_wb", []> {
   let AsmMatchConverter = "cvtStWriteBackRegT2AddrModeImm8";
 }
+} // mayStore = 1, neverHasSideEffects = 1
 
 def t2STR_POST : T2Ipostldst<0, 0b10, 0, 0, (outs GPRnopc:$Rn_wb),
                             (ins rGPR:$Rt, addr_offset_none:$Rn,
@@ -1399,7 +1400,6 @@
       [(set GPRnopc:$Rn_wb,
             (pre_truncsti16 rGPR:$Rt, GPRnopc:$Rn, t2am_imm8_offset:$offset))]>;
 }
-} // mayStore = 1, neverHasSideEffects = 1
 
 // STRT, STRBT, STRHT all have offset mode (PUW=0b110) and are for disassembly
 // only.
Index: lib/Target/Mips/MipsISelLowering.cpp
===================================================================
--- lib/Target/Mips/MipsISelLowering.cpp	(revision 142241)
+++ lib/Target/Mips/MipsISelLowering.cpp	(working copy)
@@ -788,8 +788,6 @@
 MachineBasicBlock *
 MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
                                                 MachineBasicBlock *BB) const {
-  DebugLoc dl = MI->getDebugLoc();
-
   switch (MI->getOpcode()) {
   default:
     assert(false && "Unexpected instr type to insert");