<html><head></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Jun 20, 2010, at 1:29 PM, Dale Johannesen wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Jun 18, 2010, at 5:51 PM, Evan Cheng wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; ">A few more comments:<div><br></div><div><div>Please add a test case of an immediate call to a local function:</div><div><br></div><div>define void @f() {</div><div> ret void</div><div>}</div><div><br></div><div>define void @t4() {</div><div> tail call void @f()</div><div> ret void</div><div>}</div><div><br></div><div>On Darwin ARM, this will generate b.w. That's wrong. The .w suffix is for Thumb mode. </div></div></div></blockquote><div><br></div><div>Anton was claiming that too, but I don't believe it. A8.2 says .w "has no effect" when targeting ARM, and the Darwin assembler duly ignores it, correctly IMO.</div></div></div></blockquote><div><br></div>Even if the Darwin assembler ignores it, it's still weird. The ".w" suffix only makes sense in Thumb mode, can you fix it? Also, I suspect the llvm integrated assembler won't like it.</div><div><br><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div><br><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div><div>Also, please make sure this is disabled for Thumb1 mode since b.w is not available.</div></div></div></blockquote><div><br></div><div>Sorry about Thumb1, no matter how much testing, it's not enough...</div></div></div></blockquote><div><br></div>You are not the first one to break stuff. :-)</div><div><br></div><div>Evan</div><div><br><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div><br><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div><div>Evan</div><div><br></div><div><div>On Jun 18, 2010, at 5:44 PM, Evan Cheng wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Jun 18, 2010, at 12:00 PM, Dale Johannesen wrote:</div><blockquote type="cite"><div><font class="Apple-style-span"><br></font><br>Added: llvm/trunk/test/CodeGen/ARM/call-tc.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/call-tc.ll?rev=106299&view=auto">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/call-tc.ll?rev=106299&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/ARM/call-tc.ll (added)<br>+++ llvm/trunk/test/CodeGen/ARM/call-tc.ll Fri Jun 18 14:00:18 2010<br>@@ -0,0 +1,36 @@<br>+; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECKV4<br>+; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5<br>+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\<br>+; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF<br>+<br>+@t = weak global i32 ()* null ; <i32 ()**> [#uses=1]<br>+<br>+declare void @g(i32, i32, i32, i32)<br>+<br>+define void @f() {<br>+; CHECKELF: PLT<br>+ call void @g( i32 1, i32 2, i32 3, i32 4 )<br></div></blockquote><div><br></div>Why are you testing a non-tail call here?</div><div><br><blockquote type="cite"><div>+ ret void<br>+}<br>+<br>+define void @g.upgrd.1() {<br>+; CHECKV4: bx r0 @ TAILCALL<br>+; CHECKV5: bx r0 @ TAILCALL<br>+ %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1]<br>+ %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0]<br>+ ret void<br>+}<br>+<br>+define i32* @m_231b(i32, i32, i32*, i32*, i32*) nounwind {<br>+; CHECKV4: m_231b<br>+; CHECKV4: bx r{{.*}}<br>+BB0:<br>+ %5 = inttoptr i32 %0 to i32* ; <i32*> [#uses=1]<br>+ %t35 = volatile load i32* %5 ; <i32> [#uses=1]<br>+ %6 = inttoptr i32 %t35 to i32** ; <i32**> [#uses=1]<br>+ %7 = getelementptr i32** %6, i32 86 ; <i32**> [#uses=1]<br>+ %8 = load i32** %7 ; <i32*> [#uses=1]<br>+ %9 = bitcast i32* %8 to i32* (i32, i32*, i32, i32*, i32*, i32*)* ; <i32* (i32, i32*, i32, i32*, i32*, i32*)*> [#uses=1]<br>+ %10 = call i32* %9(i32 %0, i32* null, i32 %1, i32* %2, i32* %3, i32* %4) ; <i32*> [#uses=1]<br></div></blockquote><div><br></div>Same here.</div><div><br></div><div>Evan</div><div><br><blockquote type="cite"><div>+ ret i32* %10<br>+}<br><br>Added: llvm/trunk/test/CodeGen/ARM/ifcvt6-tc.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt6-tc.ll?rev=106299&view=auto">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ifcvt6-tc.ll?rev=106299&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/ARM/ifcvt6-tc.ll (added)<br>+++ llvm/trunk/test/CodeGen/ARM/ifcvt6-tc.ll Fri Jun 18 14:00:18 2010<br>@@ -0,0 +1,23 @@<br>+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \<br>+; RUN: grep cmpne | count 1<br>+; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \<br>+; RUN: grep bhi | count 1<br>+; Here, tail call wins over eliminating branches. It is 1 fewer instruction<br>+; and removes all stack accesses, so seems like a win.<br>+<br>+define void @foo(i32 %X, i32 %Y) {<br>+entry:<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp1 = icmp ult i32 %X, 4<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i1> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp4 = icmp eq i32 %Y, 0<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i1> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp7 = or i1 %tmp4, %tmp1<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i1> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock<br>+<br>+cond_true:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %entry<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp10 = tail call i32 (...)* @bar( )<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=0]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>ret void<br>+<br>+UnifiedReturnBlock:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %entry<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>ret void<br>+}<br>+<br>+declare i32 @bar(...)<br><br>Added: llvm/trunk/test/CodeGen/ARM/insn-sched1-tc.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/insn-sched1-tc.ll?rev=106299&view=auto">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/insn-sched1-tc.ll?rev=106299&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/ARM/insn-sched1-tc.ll (added)<br>+++ llvm/trunk/test/CodeGen/ARM/insn-sched1-tc.ll Fri Jun 18 14:00:18 2010<br>@@ -0,0 +1,11 @@<br>+; RUN: llc < %s -march=arm -mattr=+v6<br>+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 |\<br>+; RUN: grep mov | count 2<br>+<br>+define i32 @test(i32 %x) {<br>+ %tmp = trunc i32 %x to i16 ; <i16> [#uses=1]<br>+ %tmp2 = tail call i32 @f( i32 1, i16 %tmp ) ; <i32> [#uses=1]<br>+ ret i32 %tmp2<br>+}<br>+<br>+declare i32 @f(i32, i16)<br><br>Added: llvm/trunk/test/CodeGen/ARM/ldm-tc.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldm-tc.ll?rev=106299&view=auto">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldm-tc.ll?rev=106299&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/ARM/ldm-tc.ll (added)<br>+++ llvm/trunk/test/CodeGen/ARM/ldm-tc.ll Fri Jun 18 14:00:18 2010<br>@@ -0,0 +1,37 @@<br>+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s<br>+<br>+@X = external global [0 x i32] ; <[0 x i32]*> [#uses=5]<br>+<br>+define i32 @t1() {<br>+; CHECK: t1:<br>+; CHECK: ldmia<br>+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1]<br>+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]<br>+ %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; <i32> [#uses=1]<br>+ ret i32 %tmp4<br>+}<br>+<br>+define i32 @t2() {<br>+; CHECK: t2:<br>+; CHECK: ldmia<br>+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]<br>+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]<br>+ %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; <i32> [#uses=1]<br>+ %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]<br>+ ret i32 %tmp6<br>+}<br>+<br>+define i32 @t3() {<br>+; CHECK: t3:<br>+; CHECK: ldmib<br>+; CHECK: b.w _f2 @ TAILCALL<br>+ %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1]<br>+ %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; <i32> [#uses=1]<br>+ %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; <i32> [#uses=1]<br>+ %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; <i32> [#uses=1]<br>+ ret i32 %tmp6<br>+}<br>+<br>+declare i32 @f1(i32, i32)<br>+<br>+declare i32 @f2(i32, i32, i32)<br><br>Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-call-tc.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-call-tc.ll?rev=106299&view=auto">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-call-tc.ll?rev=106299&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/Thumb2/thumb2-call-tc.ll (added)<br>+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-call-tc.ll Fri Jun 18 14:00:18 2010<br>@@ -0,0 +1,27 @@<br>+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s -check-prefix=DARWIN<br>+; RUN: llc < %s -mtriple=thumbv7-linux -mattr=+thumb2 | FileCheck %s -check-prefix=LINUX<br>+<br>+@t = weak global i32 ()* null ; <i32 ()**> [#uses=1]<br>+<br>+declare void @g(i32, i32, i32, i32)<br>+<br>+define void @f() {<br>+; DARWIN: f:<br>+; DARWIN: blx _g<br>+<br>+; LINUX: f:<br>+; LINUX: bl g<br>+ call void @g( i32 1, i32 2, i32 3, i32 4 )<br>+ ret void<br>+}<br>+<br>+define void @h() {<br>+; DARWIN: h:<br>+; DARWIN: bx r0 @ TAILCALL<br>+<br>+; LINUX: h:<br>+; LINUX: bx r0 @ TAILCALL<br>+ %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1]<br>+ %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0]<br>+ ret void<br>+}<br><br>Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll?rev=106299&view=auto">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll?rev=106299&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll (added)<br>+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll Fri Jun 18 14:00:18 2010<br>@@ -0,0 +1,86 @@<br>+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s<br>+<br>+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {<br>+; CHECK: t1:<br>+; CHECK: it ne<br>+; CHECK: cmpne<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>switch i32 %c, label %cond_next [<br>+<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span> i32 1, label %cond_true<br>+<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span> i32 7, label %cond_true<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>]<br>+<br>+cond_true:<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp12 = add i32 %a, 1<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp1518 = add i32 %tmp12, %b<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>ret i32 %tmp1518<br>+<br>+cond_next:<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp15 = add i32 %b, %a<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>ret i32 %tmp15<br>+}<br>+<br>+; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.<br>+define i32 @t2(i32 %a, i32 %b) nounwind {<br>+entry:<br>+; CHECK: t2:<br>+; CHECK: ite gt<br>+; CHECK: subgt<br>+; CHECK: suble<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp1434 = icmp eq i32 %a, %b<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i1> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>br i1 %tmp1434, label %bb17, label %bb.outer<br>+<br>+bb.outer:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %cond_false, %entry<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ]<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=5]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ]<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>br label %bb<br>+<br>+bb:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %cond_true, %bb.outer<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ]<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=2]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp. = sub i32 0, %b_addr.021.0.ph<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp.40 = mul i32 %indvar, %tmp.<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=6]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i1> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>br i1 %tmp3, label %cond_true, label %cond_false<br>+<br>+cond_true:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %bb<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=2]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i1> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%indvar.next = add i32 %indvar, 1<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>br i1 %tmp1437, label %bb17, label %bb<br>+<br>+cond_false:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %bb<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=2]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp14 = icmp eq i32 %a_addr.026.0, %tmp10<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i1> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>br i1 %tmp14, label %bb17, label %bb.outer<br>+<br>+bb17:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %cond_false, %cond_true, %entry<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ]<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>ret i32 %a_addr.026.1<br>+}<br>+<br>+@x = external global i32*<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32**> [#uses=1]<br>+<br>+define void @foo(i32 %a) nounwind {<br>+entry:<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp = load i32** @x<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i32*> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>store i32 %a, i32* %tmp<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>ret void<br>+}<br>+<br>+; Tail call prevents use of ifcvt in this one. Seems like a win though.<br>+define void @t3(i32 %a, i32 %b) nounwind {<br>+entry:<br>+; CHECK: t3:<br>+; CHECK-NOT: it lt<br>+; CHECK-NOT: poplt<br>+; CHECK: b.w _foo @ TAILCALL<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>%tmp1 = icmp sgt i32 %a, 10<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; <i1> [#uses=1]<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock<br>+<br>+cond_true:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %entry<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>tail call void @foo( i32 %b )<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>ret void<br>+<br>+UnifiedReturnBlock:<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>; preds = %entry<br>+<span class="Apple-tab-span" style="white-space:pre"> </span>ret void<br>+}<br><br><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br></div></blockquote></div><br></div>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br></blockquote></div><br></div></div></blockquote></div><br></div></blockquote></div><br></body></html>