I reviewed and tested this patch. Thanks for your hard working on reporting and resolving the bug in ARM JIT.<div>LGTM.<div><br></div><div>Zonr</div><div><br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;">

From: Shih-wei Liao <<a href="mailto:sliao@google.com">sliao@google.com</a>><br>
Date: Tue, May 25, 2010 at 1:21 AM<br>
Subject: [PATCH] To handle s* registers in emitVFPLoadStoreMultipleInstruction()<br>
To: llvm-commits <<a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a>><br>
<br>
<br>
Could someone review the patch in <a href="http://llvm.org/bugs/show_bug.cgi?id=7221" target="_blank">http://llvm.org/bugs/show_bug.cgi?id=7221</a>?<br>
<br>
--- lib/Target/ARM/ARMCodeEmitter.cpp<br>
+++ lib/Target/ARM/ARMCodeEmitter.cpp<br>
       break;<br>
     ++NumRegs;<br>
   }<br>
-  Binary |= NumRegs * 2;<br>
+  // bit 8 will be set if <list> is consecutive 64-bit registers (e.g., d0)<br>
+  if(Binary & 0x100)<br>
+    Binary |= NumRegs * 2;<br>
+  else<br>
+    Binary |= NumRegs;<br>
<br>
   emitWordLE(Binary);<br>
 }<br>
<br>
Thanks.<font class="Apple-style-span" color="#888888"><font class="Apple-style-span" color="#000000"><br></font></font></blockquote></div><br></div></div>