<html><head></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Jul 28, 2009, at 9:44 PM, Chris Lattner wrote:</div><blockquote type="cite"><div><font class="Apple-style-span" color="#000000"><br></font><blockquote type="cite">+// ptest instruction we'll lower to this in X86ISelLowering <br></blockquote><blockquote type="cite">primarily from<br></blockquote><blockquote type="cite">+// the intel intrinsic that corresponds to this.<br></blockquote><blockquote type="cite">let Defs = [EFLAGS] in {<br></blockquote><blockquote type="cite">def PTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, <br></blockquote><blockquote type="cite">VR128:$src2),<br></blockquote><blockquote type="cite">- "ptest \t{$src2, $src1|$src1, $src2}", []>, <br></blockquote><blockquote type="cite">OpSize;<br></blockquote><blockquote type="cite">+ "ptest \t{$src2, $src1|$src1, $src2}",<br></blockquote><blockquote type="cite">+ [(X86ptest VR128:$src1, VR128:$src2),<br></blockquote><blockquote type="cite">+ (implicit EFLAGS)]>, OpSize;<br></blockquote><br>Do we really need "Defs = EFLAGS" *and* "implicit EFLAGS"? It seems <br>like the later one should be enough, though I don't actually know if <br>that's true. Evan or Dan would know.<br></div></blockquote><div><br></div>Unfortunately both are needed (yes we should fix it at some point). Defs = [EFLAGS] is saying the instruction implicitly defines EFLAGS. (implicit EFLAGS) is telling tablegen / scheduler the instruction produces an extra result that maps to the physical register EFLAGS. That is the syntax we use to model physical register dependency.</div><div><br></div><div>Evan</div><div><br><blockquote type="cite"><div><br><br>Something not new in this patch, but:<br><br>def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;<br><br> From my understanding, I think that ptest is commutative (but maybe <br>only for "z", but not the others?). If unconditionally true, you can <br>declare this with [SDNPCommutative] as a third argument to SDNode and <br>the instruction should be figured out to be commutative. If only true <br>in some cases, more trickery will be required.<br><br>For something like this:<br><br>define i32 @test(<4 x float> %t1, <4 x float> *%t2) nounwind {<br><span class="Apple-tab-span" style="white-space:pre"> </span>%x = load <4x float>* %t2<br> %tmp1 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %x, <4 x <br>float> %t1) nounwind readnone<br> ret i32 %tmp1<br>}<br><br>declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind <br>readnone<br><br>It should allow the instruction to fold the load instead of producing:<br><br>_test:<br><span class="Apple-tab-span" style="white-space:pre"> </span>movl<span class="Apple-tab-span" style="white-space:pre"> </span>4(%esp), %eax<br><span class="Apple-tab-span" style="white-space:pre"> </span>movaps<span class="Apple-tab-span" style="white-space:pre"> </span>(%eax), %xmm1<br><span class="Apple-tab-span" style="white-space:pre"> </span>ptest <span class="Apple-tab-span" style="white-space:pre"> </span>%xmm0, %xmm1<br><span class="Apple-tab-span" style="white-space:pre"> </span>sete<span class="Apple-tab-span" style="white-space:pre"> </span>%al<br><span class="Apple-tab-span" style="white-space:pre"> </span>movzbl<span class="Apple-tab-span" style="white-space:pre"> </span>%al, %eax<br><span class="Apple-tab-span" style="white-space:pre"> </span>ret<br><br>Does "ptest" need to be added to the load folding table in case it is <br>isel'd as reg/reg but an operand gets spilled (thus the regalloc <br>should fold the load by forming reg/mem)?<br><br>Overall, very nice job!<br><br>-Chris<br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits<br></div></blockquote></div><br></body></html>