[llvm] [X86] Fix 'mr' variants of CFCMOV instr desc (PR #88970)

via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 16 12:26:00 PDT 2024


https://github.com/darkbuck created https://github.com/llvm/llvm-project/pull/88970

- With the memory operand as the destination, 'mr' variants of CFCMOV
  works like STORE and their memory operands should be input operands
  instead of output ones.


>From 596fc83b66d8ec5be38c24e582eddf13ec6276a0 Mon Sep 17 00:00:00 2001
From: Michael Liao <michael.hliao at gmail.com>
Date: Tue, 16 Apr 2024 15:25:50 -0400
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Created using spr 1.3.4
---
 llvm/lib/Target/X86/X86InstrCMovSetCC.td | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
index 27a0c889a4da3e..e27aa4115990e9 100644
--- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td
+++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
@@ -58,8 +58,8 @@ let SchedRW = [WriteCMOV.Folded, WriteCMOV.ReadAfterFold] in {
 }
 let SchedRW = [WriteCMOV, ReadDefault, ReadDefault, ReadDefault, ReadDefault, ReadDefault],
     Predicates = [HasCMOV, HasCF, In64BitMode], mayStore = 1 in
-  def mr : ITy<0x40, MRMDestMemCC, t, (outs t.MemOperand:$dst),
-                (ins t.RegClass:$src1, ccode:$cond),
+  def mr : ITy<0x40, MRMDestMemCC, t, (outs),
+                (ins t.MemOperand:$dst, t.RegClass:$src1, ccode:$cond),
                 "cfcmov${cond}", unaryop_ndd_args, []>, UseEFLAGS, NF;
 }
 



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