[llvm] [X86][GISel] Add DU chain lookups for LOAD & STORE (PR #87453)

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Mon Apr 15 11:36:04 PDT 2024


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git-clang-format --diff ed1cfffe9b2b2d3cc9279ff83400ace156b317a2 6be9e465981e8f0d974403da817be32dcd4d40f4 -- llvm/include/llvm/CodeGen/GlobalISel/Utils.h llvm/lib/CodeGen/GlobalISel/Utils.cpp llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp llvm/lib/Target/X86/GISel/X86RegisterBankInfo.h
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diff --git a/llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp b/llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
index bc6b3aebcc..9e85424e76 100644
--- a/llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
@@ -376,13 +376,13 @@ X86RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     // In that case, we want the default mapping to be on FPR
     // instead of blind map every scalar to GPR.
     bool IsFP = any_of(MRI.use_nodbg_instructions(cast<GLoad>(MI).getDstReg()),
-               [&](const MachineInstr &UseMI) {
-                 // If we have at least one direct use in a FP instruction,
-                 // assume this was a floating point load in the IR. If it
-                 // was not, we would have had a bitcast before reaching
-                 // that instruction.
-                 return onlyUsesFP(UseMI, MRI, TRI);
-               });
+                       [&](const MachineInstr &UseMI) {
+                         // If we have at least one direct use in a FP
+                         // instruction, assume this was a floating point load
+                         // in the IR. If it was not, we would have had a
+                         // bitcast before reaching that instruction.
+                         return onlyUsesFP(UseMI, MRI, TRI);
+                       });
     getInstrPartialMappingIdxs(MI, MRI, IsFP, OpRegBankIdx);
     break;
   }

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https://github.com/llvm/llvm-project/pull/87453


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