[llvm] [RISCV][ISel] Combine scalable vector fadd/fsub/fmul with fp extend. (PR #88615)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 15 09:21:46 PDT 2024
================
@@ -13597,6 +13599,13 @@ struct NodeExtensionHelper {
case RISCVISD::VZEXT_VL:
case RISCVISD::FP_EXTEND_VL:
return OrigOperand.getOperand(0);
+ case ISD::SPLAT_VECTOR: {
+ SDValue Op = OrigOperand.getOperand(0);
+ if (Op.getOpcode() == ISD::FP_EXTEND)
+ return Op;
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topperc wrote:
Why do we need to look through scalar FP_EXTEND here, but we don't need to look throug ZERO_EXTEND or SIGN_EXTEND for integer?
https://github.com/llvm/llvm-project/pull/88615
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