[llvm] Support for i8/i16 for bitreverse using GFNI. (PR #88625)

[via llvm-commits]

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@@ -1501,6 +1503,13 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
     setOperationAction(ISD::TRUNCATE,          MVT::v32i32, Custom);
     setOperationAction(ISD::TRUNCATE,          MVT::v32i64, Custom);
 
+    if (Subtarget.hasGFNI()) {
+      setOperationAction(ISD::BITREVERSE, MVT::i8, Custom);
+      setOperationAction(ISD::BITREVERSE, MVT::i16, Custom);
+      setOperationAction(ISD::BITREVERSE, MVT::i32, Custom);
+      setOperationAction(ISD::BITREVERSE, MVT::i64, Custom);
+    }
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shamithoke wrote:

Yes - I noticed that you moved to the SSE3, but I don't quite understand how/why it works.
Is it because all the processors that support AVX also support SSSE3? 

https://github.com/llvm/llvm-project/pull/88625