[llvm] [X86][AVX] Fix handling of out-of-bounds shift amounts in AVX2 vector logical shift nodes #83840 (PR #86922)

[Simon Pilgrim via llvm-commits]

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@@ -45566,6 +45566,19 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
     }
   }
 
+  if (N->getOpcode() == ISD::VSELECT && LHS.getOpcode() == ISD::SRL &&
+      supportedVectorVarShift(VT, Subtarget, ISD::SRL)) {
+    APInt SV;
+    if (Cond.getOpcode() == ISD::SETCC && Cond.getOperand(0) == LHS.getOperand(1) &&
+        cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETULT &&
+        ISD::isConstantSplatVector(Cond.getOperand(1).getNode(), SV) &&
+        ISD::isConstantSplatVectorAllZeros(RHS.getNode()) &&
+        SV == VT.getScalarSizeInBits()) {
+      SDLoc DL(LHS);
+      return DAG.getNode(X86ISD::VSRLV, DL, LHS->getVTList(), LHS.getOperand(0), LHS.getOperand(1));
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RKSimon wrote:

`LHS.getOpcode() == ISD::SRL ? X86ISD::VSRLV : X86ISD::VSHLV`

https://github.com/llvm/llvm-project/pull/86922