[llvm] [RISCV] Use vwadd.vx for splat vector with extension (PR #87249)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 1 09:19:45 PDT 2024


================
@@ -13817,6 +13821,35 @@ struct NodeExtensionHelper {
       Mask = OrigOperand.getOperand(1);
       VL = OrigOperand.getOperand(2);
       break;
+    case ISD::SPLAT_VECTOR: {
+      SDValue ScalarOp = OrigOperand.getOperand(0);
+      unsigned ScalarOpc = ScalarOp.getOpcode();
+
+      MVT ScalarVT = ScalarOp.getSimpleValueType();
+      unsigned ScalarSize = ScalarVT.getScalarSizeInBits();
+      unsigned NarrowSize = ScalarSize / 2;
+
+      // Ensuring the scalar element is legal.
+      if (NarrowSize < 8)
+        break;
+
+      SupportsSExt = ScalarOpc == ISD::SIGN_EXTEND_INREG;
+
+      if (ScalarOpc == ISD::AND) {
----------------
topperc wrote:

Why not use ComputeNumSignBits and MaskedValueIsZero like RISCVISD::VMV_V_X_VL?

https://github.com/llvm/llvm-project/pull/87249


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