[llvm] [RISCV] Teach combineBinOpOfZExt to narrow based on known bits (PR #86680)

[Luke Lau via llvm-commits]

https://github.com/lukel97 commented:

This is probably tangential to this PR, but just want to mention that I had tried using computeKnownBits in combineBinOpOfZext last week. But it was to generalise whether we need a sign extend or zero extend for the result. I.e. to remove the hardcoded opcode == ISD::SUB.

The difficulty I ended up running into is that KnownBits doesn't store enough information about the potential range of the result. I.e. an i64 sub of two zero extended i8 integers will be between 0x00000000000000FF and 0xFFFFFFFFFFFFFF01. So the range can fit into i16, but from KnownBits perspective this is just 0x??????????????. So we can't actually tell what the minimum bit width needed is.

Presumably would need to use something based on ConstantRange instead, but I didn't find anything already in SelectionDAG.

https://github.com/llvm/llvm-project/pull/86680