[llvm] [CodeGen] Port selection dag isel to new pass manager (PR #83567)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 14 04:57:10 PDT 2024
https://github.com/paperchalice updated https://github.com/llvm/llvm-project/pull/83567
>From 607d900610a85f1227cddb86d60cb1777e2a208c Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Fri, 1 Mar 2024 20:28:09 +0800
Subject: [PATCH 1/3] [CodeGen] Port selection dag isel to new pass manager
---
llvm/include/llvm/CodeGen/SelectionDAG.h | 12 +
llvm/include/llvm/CodeGen/SelectionDAGISel.h | 45 +++-
llvm/include/llvm/CodeGen/StackProtector.h | 2 +
.../CodeGen/SelectionDAG/SelectionDAGISel.cpp | 212 +++++++++++++-----
llvm/lib/Target/X86/X86.h | 2 +-
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 13 +-
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 27 ++-
llvm/lib/Target/X86/X86ISelDAGToDAG.h | 25 +++
llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +-
llvm/lib/Target/X86/X86TargetMachine.h | 3 +
10 files changed, 274 insertions(+), 69 deletions(-)
create mode 100644 llvm/lib/Target/X86/X86ISelDAGToDAG.h
diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h
index 25e6c525b672a1..db256e5e3d3c5e 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAG.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAG.h
@@ -29,6 +29,7 @@
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineMemOperand.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
@@ -229,6 +230,7 @@ class SelectionDAG {
const TargetLibraryInfo *LibInfo = nullptr;
const FunctionVarLocs *FnVarLocs = nullptr;
MachineFunction *MF;
+ MachineFunctionAnalysisManager *MFAM = nullptr;
Pass *SDAGISelPass = nullptr;
LLVMContext *Context;
CodeGenOptLevel OptLevel;
@@ -458,6 +460,15 @@ class SelectionDAG {
UniformityInfo *UA, ProfileSummaryInfo *PSIin,
BlockFrequencyInfo *BFIin, FunctionVarLocs const *FnVarLocs);
+ void init(MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE,
+ MachineFunctionAnalysisManager &AM,
+ const TargetLibraryInfo *LibraryInfo, UniformityInfo *UA,
+ ProfileSummaryInfo *PSIin, BlockFrequencyInfo *BFIin,
+ FunctionVarLocs const *FnVarLocs) {
+ init(NewMF, NewORE, nullptr, LibraryInfo, UA, PSIin, BFIin, FnVarLocs);
+ MFAM = &AM;
+ }
+
void setFunctionLoweringInfo(FunctionLoweringInfo * FuncInfo) {
FLI = FuncInfo;
}
@@ -468,6 +479,7 @@ class SelectionDAG {
MachineFunction &getMachineFunction() const { return *MF; }
const Pass *getPass() const { return SDAGISelPass; }
+ MachineFunctionAnalysisManager *getMFAM() { return MFAM; }
const DataLayout &getDataLayout() const { return MF->getDataLayout(); }
const TargetMachine &getTarget() const { return TM; }
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
index 837f8bf7263ea9..34652428145c67 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
@@ -15,6 +15,7 @@
#define LLVM_CODEGEN_SELECTIONDAGISEL_H
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/IR/BasicBlock.h"
#include <memory>
@@ -24,6 +25,7 @@ class AAResults;
class AssumptionCache;
class TargetInstrInfo;
class TargetMachine;
+class SSPLayoutInfo;
class SelectionDAGBuilder;
class SDValue;
class MachineRegisterInfo;
@@ -31,6 +33,7 @@ class MachineFunction;
class OptimizationRemarkEmitter;
class TargetLowering;
class TargetLibraryInfo;
+class TargetTransformInfo;
class FunctionLoweringInfo;
class SwiftErrorValueTracking;
class GCFunctionInfo;
@@ -38,7 +41,7 @@ class ScheduleDAGSDNodes;
/// SelectionDAGISel - This is the common base class used for SelectionDAG-based
/// pattern-matching instruction selectors.
-class SelectionDAGISel : public MachineFunctionPass {
+class SelectionDAGISel {
public:
TargetMachine &TM;
const TargetLibraryInfo *LibInfo;
@@ -51,6 +54,8 @@ class SelectionDAGISel : public MachineFunctionPass {
AAResults *AA = nullptr;
AssumptionCache *AC = nullptr;
GCFunctionInfo *GFI = nullptr;
+ SSPLayoutInfo *SP = nullptr;
+ TargetTransformInfo *TTI = nullptr;
CodeGenOptLevel OptLevel;
const TargetInstrInfo *TII;
const TargetLowering *TLI;
@@ -67,16 +72,22 @@ class SelectionDAGISel : public MachineFunctionPass {
/// functions. Storing the filter result here so that we only need to do the
/// filtering once.
bool MatchFilterFuncName = false;
+ StringRef FuncName;
- explicit SelectionDAGISel(char &ID, TargetMachine &tm,
+ explicit SelectionDAGISel(TargetMachine &tm,
CodeGenOptLevel OL = CodeGenOptLevel::Default);
- ~SelectionDAGISel() override;
+ ~SelectionDAGISel();
const TargetLowering *getTargetLowering() const { return TLI; }
- void getAnalysisUsage(AnalysisUsage &AU) const override;
+ void initialize(MachineFunctionAnalysisManager &MFAM);
+ void initialize(MachineFunctionPass &MFP);
- bool runOnMachineFunction(MachineFunction &MF) override;
+ /// Subclasses can override this function to set Subtarget
+ /// before running the pass.
+ virtual void prepare(MachineFunction &MF) {}
+
+ bool runOnMachineFunction(MachineFunction &mf, bool Skipped);
virtual void emitFunctionEntryCode() {}
@@ -517,6 +528,30 @@ class SelectionDAGISel : public MachineFunctionPass {
bool isMorphNodeTo);
};
+class SelectionDAGISelLegacy : public MachineFunctionPass {
+ std::unique_ptr<SelectionDAGISel> Selector;
+
+public:
+ SelectionDAGISelLegacy(char &ID, std::unique_ptr<SelectionDAGISel> S);
+
+ ~SelectionDAGISelLegacy() override = default;
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+
+ bool runOnMachineFunction(MachineFunction &MF) override;
+};
+
+class SelectionDAGISelPass : public PassInfoMixin<SelectionDAGISelPass> {
+ std::unique_ptr<SelectionDAGISel> Selector;
+
+protected:
+ SelectionDAGISelPass(std::unique_ptr<SelectionDAGISel> Selector)
+ : Selector(std::move(Selector)) {}
+
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
}
#endif /* LLVM_CODEGEN_SELECTIONDAGISEL_H */
diff --git a/llvm/include/llvm/CodeGen/StackProtector.h b/llvm/include/llvm/CodeGen/StackProtector.h
index eb5d9d0caebc60..dfafc781067d71 100644
--- a/llvm/include/llvm/CodeGen/StackProtector.h
+++ b/llvm/include/llvm/CodeGen/StackProtector.h
@@ -109,6 +109,8 @@ class StackProtector : public FunctionPass {
StackProtector();
+ SSPLayoutInfo &getLayoutInfo() { return LayoutInfo; }
+
void getAnalysisUsage(AnalysisUsage &AU) const override;
// Return true if StackProtector is supposed to be handled by SelectionDAG.
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index c78c3ed294e46b..31256daaff7e13 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -341,9 +341,34 @@ void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
// SelectionDAGISel code
//===----------------------------------------------------------------------===//
-SelectionDAGISel::SelectionDAGISel(char &ID, TargetMachine &tm,
- CodeGenOptLevel OL)
- : MachineFunctionPass(ID), TM(tm), FuncInfo(new FunctionLoweringInfo()),
+SelectionDAGISelLegacy::SelectionDAGISelLegacy(
+ char &ID, std::unique_ptr<SelectionDAGISel> S)
+ : MachineFunctionPass(ID), Selector(std::move(S)) {
+ initializeGCModuleInfoPass(*PassRegistry::getPassRegistry());
+ initializeBranchProbabilityInfoWrapperPassPass(
+ *PassRegistry::getPassRegistry());
+ initializeAAResultsWrapperPassPass(*PassRegistry::getPassRegistry());
+ initializeTargetLibraryInfoWrapperPassPass(*PassRegistry::getPassRegistry());
+}
+
+bool SelectionDAGISelLegacy::runOnMachineFunction(MachineFunction &MF) {
+ // If we already selected that function, we do not need to run SDISel.
+ if (MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::Selected))
+ return false;
+
+ // Do some sanity-checking on the command-line options.
+ assert((!EnableFastISelAbort || Selector->TM.Options.EnableFastISel) &&
+ "-fast-isel-abort > 0 requires -fast-isel");
+
+ Selector->MF = &MF;
+ Selector->prepare(MF);
+ Selector->initialize(*this);
+ return Selector->runOnMachineFunction(MF, skipFunction(MF.getFunction()));
+}
+
+SelectionDAGISel::SelectionDAGISel(TargetMachine &tm, CodeGenOptLevel OL)
+ : TM(tm), FuncInfo(new FunctionLoweringInfo()),
SwiftError(new SwiftErrorValueTracking()),
CurDAG(new SelectionDAG(tm, OL)),
SDB(std::make_unique<SelectionDAGBuilder>(*CurDAG, *FuncInfo, *SwiftError,
@@ -361,7 +386,8 @@ SelectionDAGISel::~SelectionDAGISel() {
delete SwiftError;
}
-void SelectionDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {
+void SelectionDAGISelLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
+ const auto &OptLevel = Selector->OptLevel;
if (OptLevel != CodeGenOptLevel::None)
AU.addRequired<AAResultsWrapperPass>();
AU.addRequired<GCModuleInfo>();
@@ -406,64 +432,117 @@ static void computeUsesMSVCFloatingPoint(const Triple &TT, const Function &F,
}
}
-bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
+PreservedAnalyses
+SelectionDAGISelPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
// If we already selected that function, we do not need to run SDISel.
- if (mf.getProperties().hasProperty(
+ if (MF.getProperties().hasProperty(
MachineFunctionProperties::Property::Selected))
- return false;
+ return PreservedAnalyses::all();
+
// Do some sanity-checking on the command-line options.
- assert((!EnableFastISelAbort || TM.Options.EnableFastISel) &&
+ assert((!EnableFastISelAbort || Selector->TM.Options.EnableFastISel) &&
"-fast-isel-abort > 0 requires -fast-isel");
- const Function &Fn = mf.getFunction();
- MF = &mf;
+ Selector->MF = &MF;
+ Selector->prepare(MF);
+ Selector->initialize(MFAM);
+ Selector->runOnMachineFunction(MF, false);
+ return PreservedAnalyses::none();
+}
+
+void SelectionDAGISel::initialize(MachineFunctionAnalysisManager &MFAM) {
+ auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(*MF)
+ .getManager();
+ auto &MAMP = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(*MF);
+ Function &Fn = MF->getFunction();
#ifndef NDEBUG
- StringRef FuncName = Fn.getName();
+ FuncName = Fn.getName();
MatchFilterFuncName = isFunctionInPrintList(FuncName);
#else
(void)MatchFilterFuncName;
#endif
- // Decide what flavour of variable location debug-info will be used, before
- // we change the optimisation level.
- bool InstrRef = mf.shouldUseDebugInstrRef();
- mf.setUseDebugInstrRef(InstrRef);
+ TII = MF->getSubtarget().getInstrInfo();
+ TLI = MF->getSubtarget().getTargetLowering();
+ RegInfo = &MF->getRegInfo();
+ LibInfo = &FAM.getResult<TargetLibraryAnalysis>(Fn);
+ GFI = Fn.hasGC() ? &FAM.getResult<GCFunctionAnalysis>(Fn) : nullptr;
+ ORE = std::make_unique<OptimizationRemarkEmitter>(&Fn);
+ AC = &FAM.getResult<AssumptionAnalysis>(Fn);
+ auto *PSI = MAMP.getCachedResult<ProfileSummaryAnalysis>(*Fn.getParent());
+ BlockFrequencyInfo *BFI = nullptr;
+ FAM.getResult<BlockFrequencyAnalysis>(Fn);
+ if (PSI && PSI->hasProfileSummary() && OptLevel != CodeGenOptLevel::None)
+ BFI = &FAM.getResult<BlockFrequencyAnalysis>(Fn);
- // Reset the target options before resetting the optimization
- // level below.
- // FIXME: This is a horrible hack and should be processed via
- // codegen looking at the optimization level explicitly when
- // it wants to look at it.
- TM.resetTargetOptions(Fn);
- // Reset OptLevel to None for optnone functions.
- CodeGenOptLevel NewOptLevel = OptLevel;
- if (OptLevel != CodeGenOptLevel::None && skipFunction(Fn))
- NewOptLevel = CodeGenOptLevel::None;
- OptLevelChanger OLC(*this, NewOptLevel);
+ FunctionVarLocs const *FnVarLocs = nullptr;
+ if (isAssignmentTrackingEnabled(*Fn.getParent()))
+ FnVarLocs = &FAM.getResult<DebugAssignmentTrackingAnalysis>(Fn);
+
+ ISEL_DUMP(dbgs() << "\n\n\n=== " << FuncName << "\n");
+
+ auto *UA = FAM.getCachedResult<UniformityInfoAnalysis>(Fn);
+ CurDAG->init(*MF, *ORE, MFAM, LibInfo, UA, PSI, BFI, FnVarLocs);
+ FuncInfo->set(Fn, *MF, CurDAG);
+ SwiftError->setFunction(*MF);
+
+ // Now get the optional analyzes if we want to.
+ // This is based on the possibly changed OptLevel (after optnone is taken
+ // into account). That's unfortunate but OK because it just means we won't
+ // ask for passes that have been required anyway.
+
+ FAM.getResult<BranchProbabilityAnalysis>(Fn);
+ if (UseMBPI && OptLevel != CodeGenOptLevel::None)
+ FuncInfo->BPI = &FAM.getResult<BranchProbabilityAnalysis>(Fn);
+ else
+ FuncInfo->BPI = nullptr;
+
+ if (OptLevel != CodeGenOptLevel::None)
+ AA = &FAM.getResult<AAManager>(Fn);
+ else
+ AA = nullptr;
+
+ SP = &FAM.getResult<SSPLayoutAnalysis>(Fn);
+
+#ifndef NDEBUG
+ TTI = &FAM.getResult<TargetIRAnalysis>(Fn);
+#endif
+}
+
+void SelectionDAGISel::initialize(MachineFunctionPass &MFP) {
+ Function &Fn = MF->getFunction();
+#ifndef NDEBUG
+ FuncName = Fn.getName();
+ MatchFilterFuncName = isFunctionInPrintList(FuncName);
+#else
+ (void)MatchFilterFuncName;
+#endif
TII = MF->getSubtarget().getInstrInfo();
TLI = MF->getSubtarget().getTargetLowering();
RegInfo = &MF->getRegInfo();
- LibInfo = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(Fn);
- GFI = Fn.hasGC() ? &getAnalysis<GCModuleInfo>().getFunctionInfo(Fn) : nullptr;
+ LibInfo = &MFP.getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(Fn);
+ GFI = Fn.hasGC() ? &MFP.getAnalysis<GCModuleInfo>().getFunctionInfo(Fn)
+ : nullptr;
ORE = std::make_unique<OptimizationRemarkEmitter>(&Fn);
- AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(mf.getFunction());
- auto *PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
+ AC = &MFP.getAnalysis<AssumptionCacheTracker>().getAssumptionCache(Fn);
+ auto *PSI = &MFP.getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
BlockFrequencyInfo *BFI = nullptr;
if (PSI && PSI->hasProfileSummary() && OptLevel != CodeGenOptLevel::None)
- BFI = &getAnalysis<LazyBlockFrequencyInfoPass>().getBFI();
+ BFI = &MFP.getAnalysis<LazyBlockFrequencyInfoPass>().getBFI();
FunctionVarLocs const *FnVarLocs = nullptr;
if (isAssignmentTrackingEnabled(*Fn.getParent()))
- FnVarLocs = getAnalysis<AssignmentTrackingAnalysis>().getResults();
+ FnVarLocs = MFP.getAnalysis<AssignmentTrackingAnalysis>().getResults();
ISEL_DUMP(dbgs() << "\n\n\n=== " << FuncName << "\n");
UniformityInfo *UA = nullptr;
- if (auto *UAPass = getAnalysisIfAvailable<UniformityInfoWrapperPass>())
+ if (auto *UAPass = MFP.getAnalysisIfAvailable<UniformityInfoWrapperPass>())
UA = &UAPass->getUniformityInfo();
- CurDAG->init(*MF, *ORE, this, LibInfo, UA, PSI, BFI, FnVarLocs);
+ CurDAG->init(*MF, *ORE, &MFP, LibInfo, UA, PSI, BFI, FnVarLocs);
FuncInfo->set(Fn, *MF, CurDAG);
SwiftError->setFunction(*MF);
@@ -473,15 +552,46 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
// ask for passes that have been required anyway.
if (UseMBPI && OptLevel != CodeGenOptLevel::None)
- FuncInfo->BPI = &getAnalysis<BranchProbabilityInfoWrapperPass>().getBPI();
+ FuncInfo->BPI =
+ &MFP.getAnalysis<BranchProbabilityInfoWrapperPass>().getBPI();
else
FuncInfo->BPI = nullptr;
if (OptLevel != CodeGenOptLevel::None)
- AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
+ AA = &MFP.getAnalysis<AAResultsWrapperPass>().getAAResults();
else
AA = nullptr;
+ SP = &MFP.getAnalysis<StackProtector>().getLayoutInfo();
+
+#ifndef NDEBUG
+ TTI =
+ &MFP.getAnalysis<TargetTransformInfoWrapperPass>().getTTI(*FuncInfo->Fn);
+#endif
+}
+
+bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf, bool Skipped) {
+ const Function &Fn = mf.getFunction();
+
+ // Decide what flavour of variable location debug-info will be used, before
+ // we change the optimisation level.
+ bool InstrRef = mf.shouldUseDebugInstrRef();
+ mf.setUseDebugInstrRef(InstrRef);
+
+ // Reset the target options before resetting the optimization
+ // level below.
+ // FIXME: This is a horrible hack and should be processed via
+ // codegen looking at the optimization level explicitly when
+ // it wants to look at it.
+ TM.resetTargetOptions(Fn);
+ // Reset OptLevel to None for optnone functions.
+ CodeGenOptLevel NewOptLevel = OptLevel;
+ if (OptLevel != CodeGenOptLevel::None && Skipped)
+ NewOptLevel = CodeGenOptLevel::None;
+ OptLevelChanger OLC(*this, NewOptLevel);
+
+ ISEL_DUMP(dbgs() << "\n\n\n=== " << FuncName << "\n");
+
SDB->init(GFI, AA, AC, LibInfo);
MF->setHasInlineAsm(false);
@@ -779,11 +889,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
StringRef GroupName = "sdag";
StringRef GroupDescription = "Instruction Selection and Scheduling";
std::string BlockName;
- bool MatchFilterBB = false; (void)MatchFilterBB;
-#ifndef NDEBUG
- TargetTransformInfo &TTI =
- getAnalysis<TargetTransformInfoWrapperPass>().getTTI(*FuncInfo->Fn);
-#endif
+ bool MatchFilterBB = false;
+ (void)MatchFilterBB;
// Pre-type legalization allow creation of any node types.
CurDAG->NewNodesMustHaveLegalTypes = false;
@@ -808,7 +915,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -828,7 +935,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -850,7 +957,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -874,7 +981,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
}
@@ -892,7 +999,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -908,7 +1015,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -928,7 +1035,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
}
@@ -948,7 +1055,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -968,7 +1075,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
CurDAG->dump());
#ifndef NDEBUG
- if (TTI.hasBranchDivergence())
+ if (TTI->hasBranchDivergence())
CurDAG->VerifyDAGDivergence();
#endif
@@ -1554,7 +1661,6 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
}
// Iterate over all basic blocks in the function.
- StackProtector &SP = getAnalysis<StackProtector>();
for (const BasicBlock *LLVMBB : RPOT) {
if (OptLevel != CodeGenOptLevel::None) {
bool AllPredsVisited = true;
@@ -1730,7 +1836,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
FastIS->recomputeInsertPt();
}
- if (SP.shouldEmitSDCheck(*LLVMBB)) {
+ if (SP->shouldEmitSDCheck(*LLVMBB)) {
bool FunctionBasedInstrumentation =
TLI->getSSPStackGuardCheck(*Fn.getParent());
SDB->SPDescriptor.initialize(LLVMBB, FuncInfo->MBBMap[LLVMBB],
@@ -1767,7 +1873,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
if (Fn.getParent()->getModuleFlag("eh-asynch"))
reportIPToStateForBlocks(MF);
- SP.copyToMachineFrameInfo(MF->getFrameInfo());
+ SP->copyToMachineFrameInfo(MF->getFrameInfo());
SwiftError->propagateVRegs();
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index 21623a805f5568..fdb9e4cad5e897 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -179,7 +179,7 @@ void initializeX86AvoidSFBPassPass(PassRegistry &);
void initializeX86AvoidTrailingCallPassPass(PassRegistry &);
void initializeX86CallFrameOptimizationPass(PassRegistry &);
void initializeX86CmovConverterPassPass(PassRegistry &);
-void initializeX86DAGToDAGISelPass(PassRegistry &);
+void initializeX86DAGToDAGISelLegacyPass(PassRegistry &);
void initializeX86DomainReassignmentPass(PassRegistry &);
void initializeX86ExecutionDomainFixPass(PassRegistry &);
void initializeX86ExpandPseudoPass(PassRegistry &);
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index 6ef28b373cc931..cfeb0abddeef2a 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -10,10 +10,12 @@
/// TODO: Port CodeGen passes to new pass manager.
//===----------------------------------------------------------------------===//
+#include "X86ISelDAGToDAG.h"
#include "X86TargetMachine.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/Passes/CodeGenPassBuilder.h"
+#include "llvm/Passes/PassBuilder.h"
using namespace llvm;
@@ -39,13 +41,22 @@ void X86CodeGenPassBuilder::addAsmPrinter(AddMachinePass &addPass,
// TODO: Add AsmPrinter.
}
-Error X86CodeGenPassBuilder::addInstSelector(AddMachinePass &) const {
+Error X86CodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
// TODO: Add instruction selector.
+ addPass(X86ISelDAGToDAGPass(static_cast<X86TargetMachine &>(TM)));
return Error::success();
}
} // namespace
+void X86TargetMachine::registerPassBuilderCallbacks(
+ PassBuilder &PB, bool PopulateClassToPassNames) {
+ if (PopulateClassToPassNames) {
+ auto *PIC = PB.getPassInstrumentationCallbacks();
+ PIC->addClassToPassName(X86ISelDAGToDAGPass::name(), "x86-isel");
+ }
+}
+
Error X86TargetMachine::buildCodeGenPipeline(
ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
CodeGenFileType FileType, CGPassBuilderOption Opt,
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 76c6c1645239ab..8c48b92604ff90 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -11,6 +11,7 @@
//
//===----------------------------------------------------------------------===//
+#include "X86ISelDAGToDAG.h"
#include "X86.h"
#include "X86MachineFunctionInfo.h"
#include "X86RegisterInfo.h"
@@ -174,10 +175,10 @@ namespace {
X86DAGToDAGISel() = delete;
explicit X86DAGToDAGISel(X86TargetMachine &tm, CodeGenOptLevel OptLevel)
- : SelectionDAGISel(ID, tm, OptLevel), Subtarget(nullptr),
+ : SelectionDAGISel(tm, OptLevel), Subtarget(nullptr),
OptForMinSize(false), IndirectTlsSegRefs(false) {}
- bool runOnMachineFunction(MachineFunction &MF) override {
+ void prepare(MachineFunction &MF) override {
// Reset the subtarget each time through.
Subtarget = &MF.getSubtarget<X86Subtarget>();
IndirectTlsSegRefs = MF.getFunction().hasFnAttribute(
@@ -187,9 +188,6 @@ namespace {
OptForMinSize = MF.getFunction().hasMinSize();
assert((!OptForMinSize || MF.getFunction().hasOptSize()) &&
"OptForMinSize implies OptForSize");
-
- SelectionDAGISel::runOnMachineFunction(MF);
- return true;
}
void emitFunctionEntryCode() override;
@@ -577,11 +575,20 @@ namespace {
bool hasNoSignFlagUses(SDValue Flags) const;
bool hasNoCarryFlagUses(SDValue Flags) const;
};
+
+ class X86DAGToDAGISelLegacy : public SelectionDAGISelLegacy {
+ public:
+ static char ID;
+ explicit X86DAGToDAGISelLegacy(X86TargetMachine &tm,
+ CodeGenOptLevel OptLevel)
+ : SelectionDAGISelLegacy(
+ ID, std::make_unique<X86DAGToDAGISel>(tm, OptLevel)) {}
+ };
}
-char X86DAGToDAGISel::ID = 0;
+char X86DAGToDAGISelLegacy::ID = 0;
-INITIALIZE_PASS(X86DAGToDAGISel, DEBUG_TYPE, PASS_NAME, false, false)
+INITIALIZE_PASS(X86DAGToDAGISelLegacy, DEBUG_TYPE, PASS_NAME, false, false)
// Returns true if this masked compare can be implemented legally with this
// type.
@@ -6545,9 +6552,13 @@ bool X86DAGToDAGISel::SelectInlineAsmMemoryOperand(
return false;
}
+X86ISelDAGToDAGPass::X86ISelDAGToDAGPass(X86TargetMachine &TM)
+ : SelectionDAGISelPass(
+ std::make_unique<X86DAGToDAGISel>(TM, TM.getOptLevel())) {}
+
/// This pass converts a legalized DAG into a X86-specific DAG,
/// ready for instruction scheduling.
FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM,
CodeGenOptLevel OptLevel) {
- return new X86DAGToDAGISel(TM, OptLevel);
+ return new X86DAGToDAGISelLegacy(TM, OptLevel);
}
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.h b/llvm/lib/Target/X86/X86ISelDAGToDAG.h
new file mode 100644
index 00000000000000..1f30c25b502fc0
--- /dev/null
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.h
@@ -0,0 +1,25 @@
+//===-- X86ISelDAGToDAG.h ---------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_X86_X86ISELDAGTODAG_H
+#define LLVM_LIB_TARGET_X86_X86ISELDAGTODAG_H
+
+#include "llvm/CodeGen/SelectionDAGISel.h"
+
+namespace llvm {
+
+class X86TargetMachine;
+
+class X86ISelDAGToDAGPass : public SelectionDAGISelPass {
+public:
+ X86ISelDAGToDAGPass(X86TargetMachine &TM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_LIB_TARGET_X86_X86ISELDAGTODAG_H
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 276bc7f08d4cd7..2a52aa35aa7c74 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -100,7 +100,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86Target() {
initializeX86PartialReductionPass(PR);
initializePseudoProbeInserterPass(PR);
initializeX86ReturnThunksPass(PR);
- initializeX86DAGToDAGISelPass(PR);
+ initializeX86DAGToDAGISelLegacyPass(PR);
initializeX86ArgumentStackSlotPassPass(PR);
initializeX86FixupInstTuningPassPass(PR);
initializeX86FixupVectorConstantsPassPass(PR);
diff --git a/llvm/lib/Target/X86/X86TargetMachine.h b/llvm/lib/Target/X86/X86TargetMachine.h
index 0fd3e47aaefe7e..cf638105a9b7cf 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.h
+++ b/llvm/lib/Target/X86/X86TargetMachine.h
@@ -58,6 +58,9 @@ class X86TargetMachine final : public LLVMTargetMachine {
createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
const TargetSubtargetInfo *STI) const override;
+ void registerPassBuilderCallbacks(PassBuilder &PB,
+ bool PopulateClassToPassNames) override;
+
Error buildCodeGenPipeline(ModulePassManager &, raw_pwrite_stream &,
raw_pwrite_stream *, CodeGenFileType,
CGPassBuilderOption,
>From fa877feaf6dc95e3ae51970be189cea702034744 Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Fri, 8 Mar 2024 13:00:08 +0800
Subject: [PATCH 2/3] use X86PassRegistry
---
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 16 +++++++++++++++-
llvm/lib/Target/X86/X86PassRegistry.def | 19 +++++++++++++++++++
2 files changed, 34 insertions(+), 1 deletion(-)
create mode 100644 llvm/lib/Target/X86/X86PassRegistry.def
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index cfeb0abddeef2a..b94ce340f7af26 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -53,8 +53,22 @@ void X86TargetMachine::registerPassBuilderCallbacks(
PassBuilder &PB, bool PopulateClassToPassNames) {
if (PopulateClassToPassNames) {
auto *PIC = PB.getPassInstrumentationCallbacks();
- PIC->addClassToPassName(X86ISelDAGToDAGPass::name(), "x86-isel");
+#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS) \
+ PIC->addClassToPassName(decltype(CREATE_PASS)::name(), NAME);
+#include "X86PassRegistry.def"
}
+
+ PB.registerPipelineParsingCallback(
+ [this](StringRef Name, MachineFunctionPassManager &MFPM,
+ ArrayRef<PassBuilder::PipelineElement>) {
+#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS) \
+ if (Name == NAME) { \
+ MFPM.addPass(CREATE_PASS); \
+ return true; \
+ }
+#include "X86PassRegistry.def"
+ return false;
+ });
}
Error X86TargetMachine::buildCodeGenPipeline(
diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def
new file mode 100644
index 00000000000000..c77b56bbb8a1b3
--- /dev/null
+++ b/llvm/lib/Target/X86/X86PassRegistry.def
@@ -0,0 +1,19 @@
+//===- X86PassRegistry.def - Registry of X86 specific passes ----*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file is used as the registry of passes that are part of the X86 backend.
+//
+//===----------------------------------------------------------------------===//
+
+// NOTE: NO INCLUDE GUARD DESIRED!
+
+#ifndef MACHINE_FUNCTION_PASS
+#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
+#endif
+MACHINE_FUNCTION_PASS(X86ISelDAGToDAGPass, X86ISelDAGToDAGPass(*this))
+#undef MACHINE_FUNCTION_PASS
>From 7895b9305665765d9b79ace5d908963c91d59382 Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Thu, 14 Mar 2024 19:56:53 +0800
Subject: [PATCH 3/3] remove redundant assignment
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 4 ----
1 file changed, 4 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 31256daaff7e13..26d0e25358223b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -496,13 +496,9 @@ void SelectionDAGISel::initialize(MachineFunctionAnalysisManager &MFAM) {
FAM.getResult<BranchProbabilityAnalysis>(Fn);
if (UseMBPI && OptLevel != CodeGenOptLevel::None)
FuncInfo->BPI = &FAM.getResult<BranchProbabilityAnalysis>(Fn);
- else
- FuncInfo->BPI = nullptr;
if (OptLevel != CodeGenOptLevel::None)
AA = &FAM.getResult<AAManager>(Fn);
- else
- AA = nullptr;
SP = &FAM.getResult<SSPLayoutAnalysis>(Fn);
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