[llvm] [X86][AVX] Fix handling of out-of-bounds shift amounts in AVX2 vector shift nodes (PR #84426)

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git-clang-format --diff 6e27dd47e1fc17cf661b568901fe7392ed1b8f2b f48f6a56bd88dbc5c105c62be99b980ee2b416c1 -- llvm/lib/Target/X86/X86ISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index ea15702c1d..82828d62aa 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -28927,8 +28927,8 @@ SDValue X86TargetLowering::LowerWin64_INT128_TO_FP(SDValue Op,
 // supported by the Subtarget
 static bool supportedVectorShiftWithImm(EVT VT, const X86Subtarget &Subtarget,
                                         unsigned Opcode) {
-  assert(Opcode == ISD::SHL || Opcode == ISD::SRA || Opcode == ISD::SRL &&
-        "Unexpected Opcode!");
+  assert(Opcode == ISD::SHL || Opcode == ISD::SRA ||
+         Opcode == ISD::SRL && "Unexpected Opcode!");
 
   if (!VT.isSimple())
     return false;

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https://github.com/llvm/llvm-project/pull/84426