[llvm] Fix stack layout for frames larger than 2gb (PR #84114)
Wesley Wiser via llvm-commits
llvm-commits at lists.llvm.org
Sat Mar 9 15:05:20 PST 2024
https://github.com/wesleywiser updated https://github.com/llvm/llvm-project/pull/84114
>From d6378c5d18612ce8962f4c97703877cc13bc342f Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Tue, 5 Mar 2024 19:56:34 +0000
Subject: [PATCH 1/9] [nfc] Add x86 test case for huge stacks
---
llvm/test/CodeGen/X86/huge-stack.ll | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 llvm/test/CodeGen/X86/huge-stack.ll
diff --git a/llvm/test/CodeGen/X86/huge-stack.ll b/llvm/test/CodeGen/X86/huge-stack.ll
new file mode 100644
index 00000000000000..a140d2511916d8
--- /dev/null
+++ b/llvm/test/CodeGen/X86/huge-stack.ll
@@ -0,0 +1,22 @@
+; RUN: llc -O0 -mtriple=x86_64 < %s | FileCheck %s --check-prefix=CHECK
+%large = type [4294967295 x i8]
+
+define void @foo() unnamed_addr #0 {
+ %1 = alloca %large, align 1
+ %2 = alloca %large, align 1
+ %3 = getelementptr inbounds %large, %large* %1, i64 0, i64 0
+ store i8 42, i8* %3, align 1
+ %4 = getelementptr inbounds %large, %large* %2, i64 0, i64 0
+ store i8 43, i8* %4, align 1
+ ret void
+}
+
+; CHECK-LABEL: foo:
+; CHECK: movabsq $8589934462, %rax
+; CHECK-NEXT: subq %rax, %rsp
+; CHECK-NEXT: .cfi_def_cfa_offset -122
+; CHECK-NEXT: movb $42, -129(%rsp)
+; CHECK-NEXT: movb $43, -128(%rsp)
+; CHECK-NEXT: movabsq $8589934462, %rax
+; CHECK-NEXT: addq %rax, %rsp
+; CHECK-NEXT: .cfi_def_cfa_offset 8
>From e92da8c9f10e1d5bd16a5eef2e8d79ad3de4df98 Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Wed, 6 Mar 2024 02:47:41 +0000
Subject: [PATCH 2/9] Fix stack layout for frames larger than 2gb
For very large stack frames, the offset from the stack pointer to a
local can be more than 2^31 which overflows various `int` offsets
in the frame lowering code.
This patch updates the frame lowering code to calculate the offsets as
64-bit values and resolves the overflows, resulting in the correct
codegen for very large frames.
---
llvm/include/llvm/CodeGen/MachineFrameInfo.h | 16 ++++----
.../llvm/CodeGen/TargetFrameLowering.h | 4 +-
llvm/include/llvm/MC/MCAsmBackend.h | 2 +-
llvm/include/llvm/MC/MCDwarf.h | 38 +++++++++----------
llvm/lib/CodeGen/CFIInstrInserter.cpp | 10 ++---
llvm/lib/CodeGen/MachineFrameInfo.cpp | 2 +-
llvm/lib/CodeGen/PrologEpilogInserter.cpp | 4 +-
llvm/lib/MC/MCDwarf.cpp | 6 +--
.../MCTargetDesc/AArch64AsmBackend.cpp | 10 ++---
llvm/lib/Target/ARM/ARMFrameLowering.cpp | 4 +-
.../Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 2 +-
.../ARM/MCTargetDesc/ARMAsmBackendDarwin.h | 2 +-
.../Target/Hexagon/HexagonFrameLowering.cpp | 4 +-
.../lib/Target/MSP430/MSP430FrameLowering.cpp | 2 +-
.../Target/X86/MCTargetDesc/X86AsmBackend.cpp | 12 +++---
.../X86/MCTargetDesc/X86MCCodeEmitter.cpp | 13 ++++---
llvm/lib/Target/X86/X86FrameLowering.cpp | 28 +++++++-------
llvm/lib/Target/X86/X86FrameLowering.h | 4 +-
llvm/lib/Target/X86/X86RegisterInfo.cpp | 10 +++--
llvm/test/CodeGen/PowerPC/huge-frame-size.ll | 2 +-
llvm/test/CodeGen/X86/huge-stack.ll | 4 +-
21 files changed, 90 insertions(+), 89 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineFrameInfo.h b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
index 7d11d63d4066f4..243b124d89ff40 100644
--- a/llvm/include/llvm/CodeGen/MachineFrameInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
@@ -251,7 +251,7 @@ class MachineFrameInfo {
/// targets, this value is only used when generating debug info (via
/// TargetRegisterInfo::getFrameIndexReference); when generating code, the
/// corresponding adjustments are performed directly.
- int OffsetAdjustment = 0;
+ int64_t OffsetAdjustment = 0;
/// The prolog/epilog code inserter may process objects that require greater
/// alignment than the default alignment the target provides.
@@ -280,7 +280,7 @@ class MachineFrameInfo {
/// setup/destroy pseudo instructions (as defined in the TargetFrameInfo
/// class). This information is important for frame pointer elimination.
/// It is only valid during and after prolog/epilog code insertion.
- unsigned MaxCallFrameSize = ~0u;
+ unsigned long MaxCallFrameSize = ~0ul;
/// The number of bytes of callee saved registers that the target wants to
/// report for the current function in the CodeView S_FRAMEPROC record.
@@ -591,10 +591,10 @@ class MachineFrameInfo {
uint64_t estimateStackSize(const MachineFunction &MF) const;
/// Return the correction for frame offsets.
- int getOffsetAdjustment() const { return OffsetAdjustment; }
+ int64_t getOffsetAdjustment() const { return OffsetAdjustment; }
/// Set the correction for frame offsets.
- void setOffsetAdjustment(int Adj) { OffsetAdjustment = Adj; }
+ void setOffsetAdjustment(int64_t Adj) { OffsetAdjustment = Adj; }
/// Return the alignment in bytes that this function must be aligned to,
/// which is greater than the default stack alignment provided by the target.
@@ -651,17 +651,15 @@ class MachineFrameInfo {
/// CallFrameSetup/Destroy pseudo instructions are used by the target, and
/// then only during or after prolog/epilog code insertion.
///
- unsigned getMaxCallFrameSize() const {
+ unsigned long getMaxCallFrameSize() const {
// TODO: Enable this assert when targets are fixed.
//assert(isMaxCallFrameSizeComputed() && "MaxCallFrameSize not computed yet");
if (!isMaxCallFrameSizeComputed())
return 0;
return MaxCallFrameSize;
}
- bool isMaxCallFrameSizeComputed() const {
- return MaxCallFrameSize != ~0u;
- }
- void setMaxCallFrameSize(unsigned S) { MaxCallFrameSize = S; }
+ bool isMaxCallFrameSizeComputed() const { return MaxCallFrameSize != ~0ul; }
+ void setMaxCallFrameSize(unsigned long S) { MaxCallFrameSize = S; }
/// Returns how many bytes of callee-saved registers the target pushed in the
/// prologue. Only used for debug info.
diff --git a/llvm/include/llvm/CodeGen/TargetFrameLowering.h b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
index 0b9cacecc7cbe1..a256574d9d2bee 100644
--- a/llvm/include/llvm/CodeGen/TargetFrameLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
@@ -51,7 +51,7 @@ class TargetFrameLowering {
// Maps a callee saved register to a stack slot with a fixed offset.
struct SpillSlot {
unsigned Reg;
- int Offset; // Offset relative to stack pointer on function entry.
+ long Offset; // Offset relative to stack pointer on function entry.
};
struct DwarfFrameBase {
@@ -66,7 +66,7 @@ class TargetFrameLowering {
// Used with FrameBaseKind::Register.
unsigned Reg;
// Used with FrameBaseKind::CFA.
- int Offset;
+ long Offset;
struct WasmFrameBase WasmLoc;
} Location;
};
diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h
index 01a64fb425a94f..689e3cd5dbf206 100644
--- a/llvm/include/llvm/MC/MCAsmBackend.h
+++ b/llvm/include/llvm/MC/MCAsmBackend.h
@@ -232,7 +232,7 @@ class MCAsmBackend {
virtual void handleAssemblerFlag(MCAssemblerFlag Flag) {}
/// Generate the compact unwind encoding for the CFI instructions.
- virtual uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
+ virtual uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const {
return 0;
}
diff --git a/llvm/include/llvm/MC/MCDwarf.h b/llvm/include/llvm/MC/MCDwarf.h
index 18056c5fdf816a..e39c44f38a342a 100644
--- a/llvm/include/llvm/MC/MCDwarf.h
+++ b/llvm/include/llvm/MC/MCDwarf.h
@@ -508,7 +508,7 @@ class MCCFIInstruction {
MCSymbol *Label;
unsigned Register;
union {
- int Offset;
+ long Offset;
unsigned Register2;
};
unsigned AddressSpace = ~0u;
@@ -516,7 +516,7 @@ class MCCFIInstruction {
std::vector<char> Values;
std::string Comment;
- MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, SMLoc Loc,
+ MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, long O, SMLoc Loc,
StringRef V = "", StringRef Comment = "")
: Operation(Op), Label(L), Register(R), Offset(O), Loc(Loc),
Values(V.begin(), V.end()), Comment(Comment) {
@@ -528,7 +528,7 @@ class MCCFIInstruction {
assert(Op == OpRegister);
}
- MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, unsigned AS,
+ MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, long O, unsigned AS,
SMLoc Loc)
: Operation(Op), Label(L), Register(R), Offset(O), AddressSpace(AS),
Loc(Loc) {
@@ -538,7 +538,7 @@ class MCCFIInstruction {
public:
/// .cfi_def_cfa defines a rule for computing CFA as: take address from
/// Register and add Offset to it.
- static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset,
+ static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, long Offset,
SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfa, L, Register, Offset, Loc);
}
@@ -547,13 +547,13 @@ class MCCFIInstruction {
/// on Register will be used instead of the old one. Offset remains the same.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpDefCfaRegister, L, Register, 0, Loc);
+ return MCCFIInstruction(OpDefCfaRegister, L, Register, 0L, Loc);
}
/// .cfi_def_cfa_offset modifies a rule for computing CFA. Register
/// remains the same, but offset is new. Note that it is the absolute offset
/// that will be added to a defined register to the compute CFA address.
- static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset,
+ static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, long Offset,
SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfaOffset, L, 0, Offset, Loc);
}
@@ -561,7 +561,7 @@ class MCCFIInstruction {
/// .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but
/// Offset is a relative value that is added/subtracted from the previous
/// offset.
- static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment,
+ static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, long Adjustment,
SMLoc Loc = {}) {
return MCCFIInstruction(OpAdjustCfaOffset, L, 0, Adjustment, Loc);
}
@@ -581,7 +581,7 @@ class MCCFIInstruction {
/// .cfi_offset Previous value of Register is saved at offset Offset
/// from CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register,
- int Offset, SMLoc Loc = {}) {
+ long Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpOffset, L, Register, Offset, Loc);
}
@@ -589,7 +589,7 @@ class MCCFIInstruction {
/// Offset from the current CFA register. This is transformed to .cfi_offset
/// using the known displacement of the CFA register from the CFA.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register,
- int Offset, SMLoc Loc = {}) {
+ long Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpRelOffset, L, Register, Offset, Loc);
}
@@ -602,12 +602,12 @@ class MCCFIInstruction {
/// .cfi_window_save SPARC register window is saved.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpWindowSave, L, 0, 0, Loc);
+ return MCCFIInstruction(OpWindowSave, L, 0, 0L, Loc);
}
/// .cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpNegateRAState, L, 0, 0, Loc);
+ return MCCFIInstruction(OpNegateRAState, L, 0, 0L, Loc);
}
/// .cfi_restore says that the rule for Register is now the same as it
@@ -615,31 +615,31 @@ class MCCFIInstruction {
/// by .cfi_startproc were executed.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpRestore, L, Register, 0, Loc);
+ return MCCFIInstruction(OpRestore, L, Register, 0L, Loc);
}
/// .cfi_undefined From now on the previous value of Register can't be
/// restored anymore.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpUndefined, L, Register, 0, Loc);
+ return MCCFIInstruction(OpUndefined, L, Register, 0L, Loc);
}
/// .cfi_same_value Current value of Register is the same as in the
/// previous frame. I.e., no restoration is needed.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpSameValue, L, Register, 0, Loc);
+ return MCCFIInstruction(OpSameValue, L, Register, 0L, Loc);
}
/// .cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpRememberState, L, 0, 0, Loc);
+ return MCCFIInstruction(OpRememberState, L, 0, 0L, Loc);
}
/// .cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpRestoreState, L, 0, 0, Loc);
+ return MCCFIInstruction(OpRestoreState, L, 0, 0L, Loc);
}
/// .cfi_escape Allows the user to add arbitrary bytes to the unwind
@@ -650,7 +650,7 @@ class MCCFIInstruction {
}
/// A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE
- static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size,
+ static MCCFIInstruction createGnuArgsSize(MCSymbol *L, long Size,
SMLoc Loc = {}) {
return MCCFIInstruction(OpGnuArgsSize, L, 0, Size, Loc);
}
@@ -677,7 +677,7 @@ class MCCFIInstruction {
return AddressSpace;
}
- int getOffset() const {
+ long getOffset() const {
assert(Operation == OpDefCfa || Operation == OpOffset ||
Operation == OpRelOffset || Operation == OpDefCfaOffset ||
Operation == OpAdjustCfaOffset || Operation == OpGnuArgsSize ||
@@ -705,7 +705,7 @@ struct MCDwarfFrameInfo {
unsigned CurrentCfaRegister = 0;
unsigned PersonalityEncoding = 0;
unsigned LsdaEncoding = 0;
- uint32_t CompactUnwindEncoding = 0;
+ uint64_t CompactUnwindEncoding = 0;
bool IsSignalFrame = false;
bool IsSimple = false;
unsigned RAReg = static_cast<unsigned>(INT_MAX);
diff --git a/llvm/lib/CodeGen/CFIInstrInserter.cpp b/llvm/lib/CodeGen/CFIInstrInserter.cpp
index 87b062a16df1d2..06c4686caba96d 100644
--- a/llvm/lib/CodeGen/CFIInstrInserter.cpp
+++ b/llvm/lib/CodeGen/CFIInstrInserter.cpp
@@ -68,9 +68,9 @@ class CFIInstrInserter : public MachineFunctionPass {
struct MBBCFAInfo {
MachineBasicBlock *MBB;
/// Value of cfa offset valid at basic block entry.
- int IncomingCFAOffset = -1;
+ long IncomingCFAOffset = -1;
/// Value of cfa offset valid at basic block exit.
- int OutgoingCFAOffset = -1;
+ long OutgoingCFAOffset = -1;
/// Value of cfa register valid at basic block entry.
unsigned IncomingCFARegister = 0;
/// Value of cfa register valid at basic block exit.
@@ -120,7 +120,7 @@ class CFIInstrInserter : public MachineFunctionPass {
/// Return the cfa offset value that should be set at the beginning of a MBB
/// if needed. The negated value is needed when creating CFI instructions that
/// set absolute offset.
- int getCorrectCFAOffset(MachineBasicBlock *MBB) {
+ long getCorrectCFAOffset(MachineBasicBlock *MBB) {
return MBBVector[MBB->getNumber()].IncomingCFAOffset;
}
@@ -175,7 +175,7 @@ void CFIInstrInserter::calculateCFAInfo(MachineFunction &MF) {
void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
// Outgoing cfa offset set by the block.
- int SetOffset = MBBInfo.IncomingCFAOffset;
+ long SetOffset = MBBInfo.IncomingCFAOffset;
// Outgoing cfa register set by the block.
unsigned SetRegister = MBBInfo.IncomingCFARegister;
MachineFunction *MF = MBBInfo.MBB->getParent();
@@ -188,7 +188,7 @@ void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
for (MachineInstr &MI : *MBBInfo.MBB) {
if (MI.isCFIInstruction()) {
std::optional<unsigned> CSRReg;
- std::optional<int> CSROffset;
+ std::optional<long> CSROffset;
unsigned CFIIndex = MI.getOperand(0).getCFIIndex();
const MCCFIInstruction &CFI = Instrs[CFIIndex];
switch (CFI.getOperation()) {
diff --git a/llvm/lib/CodeGen/MachineFrameInfo.cpp b/llvm/lib/CodeGen/MachineFrameInfo.cpp
index 280d3a6a41edc9..d7dc2a926f56e2 100644
--- a/llvm/lib/CodeGen/MachineFrameInfo.cpp
+++ b/llvm/lib/CodeGen/MachineFrameInfo.cpp
@@ -196,7 +196,7 @@ void MachineFrameInfo::computeMaxCallFrameSize(const MachineFunction &MF) {
for (const MachineInstr &MI : MBB) {
unsigned Opcode = MI.getOpcode();
if (Opcode == FrameSetupOpcode || Opcode == FrameDestroyOpcode) {
- unsigned Size = TII.getFrameSize(MI);
+ unsigned long Size = TII.getFrameSize(MI);
MaxCallFrameSize = std::max(MaxCallFrameSize, Size);
AdjustsStack = true;
} else if (MI.isInlineAsm()) {
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 8af17e63e25c75..1193a79ee0b308 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -358,7 +358,7 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) {
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
MachineFrameInfo &MFI = MF.getFrameInfo();
- unsigned MaxCallFrameSize = 0;
+ unsigned long MaxCallFrameSize = 0;
bool AdjustsStack = MFI.adjustsStack();
// Get the function call frame set-up and tear-down instruction opcode
@@ -374,7 +374,7 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) {
for (MachineBasicBlock &BB : MF)
for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I)
if (TII.isFrameInstr(*I)) {
- unsigned Size = TII.getFrameSize(*I);
+ unsigned long Size = TII.getFrameSize(*I);
if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
AdjustsStack = true;
FrameSDOps.push_back(I);
diff --git a/llvm/lib/MC/MCDwarf.cpp b/llvm/lib/MC/MCDwarf.cpp
index d0face9140de66..9cb26596e82250 100644
--- a/llvm/lib/MC/MCDwarf.cpp
+++ b/llvm/lib/MC/MCDwarf.cpp
@@ -1293,8 +1293,8 @@ static void EmitPersonality(MCStreamer &streamer, const MCSymbol &symbol,
namespace {
class FrameEmitterImpl {
- int CFAOffset = 0;
- int InitialCFAOffset = 0;
+ long CFAOffset = 0;
+ long InitialCFAOffset = 0;
bool IsEH;
MCObjectStreamer &Streamer;
@@ -1408,7 +1408,7 @@ void FrameEmitterImpl::emitCFIInstruction(const MCCFIInstruction &Instr) {
if (!IsEH)
Reg = MRI->getDwarfRegNumFromDwarfEHRegNum(Reg);
- int Offset = Instr.getOffset();
+ long Offset = Instr.getOffset();
if (IsRelative)
Offset -= CFAOffset;
Offset = Offset / dataAlignmentFactor;
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index 30ef3680ae79c9..cdb4ddf471d418 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -584,7 +584,7 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
/// Encode compact unwind stack adjustment for frameless functions.
/// See UNWIND_ARM64_FRAMELESS_STACK_SIZE_MASK in compact_unwind_encoding.h.
/// The stack size always needs to be 16 byte aligned.
- uint32_t encodeStackAdjustment(uint32_t StackSize) const {
+ uint64_t encodeStackAdjustment(uint64_t StackSize) const {
return (StackSize / 16) << 12;
}
@@ -602,7 +602,7 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
}
/// Generate the compact unwind encoding from the CFI directives.
- uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
+ uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const override {
ArrayRef<MCCFIInstruction> Instrs = FI->Instructions;
if (Instrs.empty())
@@ -612,10 +612,10 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
return CU::UNWIND_ARM64_MODE_DWARF;
bool HasFP = false;
- unsigned StackSize = 0;
+ unsigned long StackSize = 0;
- uint32_t CompactUnwindEncoding = 0;
- int CurOffset = 0;
+ uint64_t CompactUnwindEncoding = 0;
+ long CurOffset = 0;
for (size_t i = 0, e = Instrs.size(); i != e; ++i) {
const MCCFIInstruction &Inst = Instrs[i];
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index 9b54dd4e4e618d..a1012f3996e76b 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -1165,7 +1165,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
if (STI.splitFramePushPop(MF)) {
unsigned DwarfReg = MRI->getDwarfRegNum(
Reg == ARM::R12 ? ARM::RA_AUTH_CODE : Reg, true);
- unsigned Offset = MFI.getObjectOffset(FI);
+ uint64_t Offset = MFI.getObjectOffset(FI);
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
@@ -1187,7 +1187,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
if ((Reg >= ARM::D0 && Reg <= ARM::D31) &&
(Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs())) {
unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
- unsigned Offset = MFI.getObjectOffset(FI);
+ uint64_t Offset = MFI.getObjectOffset(FI);
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 6cd4badb7704b7..9671f69bfd2268 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -1148,7 +1148,7 @@ enum CompactUnwindEncodings {
/// instructions. If the CFI instructions describe a frame that cannot be
/// encoded in compact unwind, the method returns UNWIND_ARM_MODE_DWARF which
/// tells the runtime to fallback and unwind using dwarf.
-uint32_t ARMAsmBackendDarwin::generateCompactUnwindEncoding(
+uint64_t ARMAsmBackendDarwin::generateCompactUnwindEncoding(
const MCDwarfFrameInfo *FI, const MCContext *Ctxt) const {
DEBUG_WITH_TYPE("compact-unwind", llvm::dbgs() << "generateCU()\n");
// Only armv7k uses CFI based unwinding.
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
index ac0c9b101cae13..9c958003ca756a 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
@@ -34,7 +34,7 @@ class ARMAsmBackendDarwin : public ARMAsmBackend {
/*Is64Bit=*/false, cantFail(MachO::getCPUType(TT)), Subtype);
}
- uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
+ uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const override;
};
} // end namespace llvm
diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index 232651132d6e4f..104de12a95404e 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -1660,7 +1660,7 @@ bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
using SpillSlot = TargetFrameLowering::SpillSlot;
unsigned NumFixed;
- int MinOffset = 0; // CS offsets are negative.
+ long MinOffset = 0; // CS offsets are negative.
const SpillSlot *FixedSlots = getCalleeSavedSpillSlots(NumFixed);
for (const SpillSlot *S = FixedSlots; S != FixedSlots+NumFixed; ++S) {
if (!SRegs[S->Reg])
@@ -1679,7 +1679,7 @@ bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
Register R = x;
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(R);
unsigned Size = TRI->getSpillSize(*RC);
- int Off = MinOffset - Size;
+ long Off = MinOffset - Size;
Align Alignment = std::min(TRI->getSpillAlign(*RC), getStackAlign());
Off &= -Alignment.value();
int FI = MFI.CreateFixedSpillStackObject(Size, Off);
diff --git a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
index 176387d71fcb6c..6acbcf5cda2423 100644
--- a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
+++ b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
@@ -294,7 +294,7 @@ void MSP430FrameLowering::emitEpilogue(MachineFunction &MF,
if (!hasFP(MF)) {
MBBI = FirstCSPop;
- int64_t Offset = -CSSize - 2;
+ int64_t Offset = -(int64_t)CSSize - 2;
// Mark callee-saved pop instruction.
// Define the current CFA rule to use the provided offset.
while (MBBI != MBB.end()) {
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 99dc9797f6df92..bb9eb3a6b47eef 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -1328,7 +1328,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
/// Implementation of algorithm to generate the compact unwind encoding
/// for the CFI instructions.
- uint32_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
+ uint64_t generateCompactUnwindEncoding(const MCDwarfFrameInfo *FI,
const MCContext *Ctxt) const override {
ArrayRef<MCCFIInstruction> Instrs = FI->Instructions;
if (Instrs.empty()) return 0;
@@ -1343,13 +1343,13 @@ class DarwinX86AsmBackend : public X86AsmBackend {
bool HasFP = false;
// Encode that we are using EBP/RBP as the frame pointer.
- uint32_t CompactUnwindEncoding = 0;
+ uint64_t CompactUnwindEncoding = 0;
unsigned SubtractInstrIdx = Is64Bit ? 3 : 2;
unsigned InstrOffset = 0;
unsigned StackAdjust = 0;
- unsigned StackSize = 0;
- int MinAbsOffset = std::numeric_limits<int>::max();
+ unsigned long StackSize = 0;
+ long MinAbsOffset = std::numeric_limits<long>::max();
for (const MCCFIInstruction &Inst : Instrs) {
switch (Inst.getOperation()) {
@@ -1376,7 +1376,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
memset(SavedRegs, 0, sizeof(SavedRegs));
StackAdjust = 0;
SavedRegIdx = 0;
- MinAbsOffset = std::numeric_limits<int>::max();
+ MinAbsOffset = std::numeric_limits<long>::max();
InstrOffset += MoveInstrSize;
break;
}
@@ -1419,7 +1419,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
unsigned Reg = *MRI.getLLVMRegNum(Inst.getRegister(), true);
SavedRegs[SavedRegIdx++] = Reg;
StackAdjust += OffsetSize;
- MinAbsOffset = std::min(MinAbsOffset, abs(Inst.getOffset()));
+ MinAbsOffset = std::min(MinAbsOffset, labs(Inst.getOffset()));
InstrOffset += PushInstrSize(Reg);
break;
}
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 1fa676eeb79b0f..1a17e32291598c 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -349,7 +349,8 @@ class X86MCCodeEmitter : public MCCodeEmitter {
void emitImmediate(const MCOperand &Disp, SMLoc Loc, unsigned ImmSize,
MCFixupKind FixupKind, uint64_t StartByte,
SmallVectorImpl<char> &CB,
- SmallVectorImpl<MCFixup> &Fixups, int ImmOffset = 0) const;
+ SmallVectorImpl<MCFixup> &Fixups,
+ long ImmOffset = 0) const;
void emitRegModRMByte(const MCOperand &ModRMReg, unsigned RegOpcodeFld,
SmallVectorImpl<char> &CB) const;
@@ -403,7 +404,7 @@ static void emitConstant(uint64_t Val, unsigned Size,
/// Determine if this immediate can fit in a disp8 or a compressed disp8 for
/// EVEX instructions. \p will be set to the value to pass to the ImmOffset
/// parameter of emitImmediate.
-static bool isDispOrCDisp8(uint64_t TSFlags, int Value, int &ImmOffset) {
+static bool isDispOrCDisp8(uint64_t TSFlags, long Value, long &ImmOffset) {
bool HasEVEX = (TSFlags & X86II::EncodingMask) == X86II::EVEX;
unsigned CD8_Scale =
@@ -416,7 +417,7 @@ static bool isDispOrCDisp8(uint64_t TSFlags, int Value, int &ImmOffset) {
if (Value & (CD8_Scale - 1)) // Unaligned offset
return false;
- int CDisp8 = Value / static_cast<int>(CD8_Scale);
+ long CDisp8 = Value / static_cast<int>(CD8_Scale);
if (!isInt<8>(CDisp8))
return false;
@@ -509,7 +510,7 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
uint64_t StartByte,
SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
- int ImmOffset) const {
+ long ImmOffset) const {
const MCExpr *Expr = nullptr;
if (DispOp.isImm()) {
// If this is a simple integer displacement that doesn't require a
@@ -790,7 +791,7 @@ void X86MCCodeEmitter::emitMemModRMByte(
// This also handles the 0 displacement for [EBP], [R13], [R21] or [R29]. We
// can't use disp8 if the {disp32} pseudo prefix is present.
if (Disp.isImm() && AllowDisp8) {
- int ImmOffset = 0;
+ long ImmOffset = 0;
if (isDispOrCDisp8(TSFlags, Disp.getImm(), ImmOffset)) {
emitByte(modRMByte(1, RegOpcodeField, BaseRegNo), CB);
emitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, StartByte, CB, Fixups,
@@ -817,7 +818,7 @@ void X86MCCodeEmitter::emitMemModRMByte(
bool ForceDisp32 = false;
bool ForceDisp8 = false;
- int ImmOffset = 0;
+ long ImmOffset = 0;
if (BaseReg == 0) {
// If there is no base register, we emit the special case SIB byte with
// MOD=0, BASE=5, to JUST get the index, scale, and displacement.
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index d914e1b61ab075..c226c91a340b0a 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -380,9 +380,9 @@ MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
return MI;
}
-int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI,
- bool doMergeWithPrevious) const {
+long X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ bool doMergeWithPrevious) const {
if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
(!doMergeWithPrevious && MBBI == MBB.end()))
return 0;
@@ -405,7 +405,7 @@ int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
PI = std::prev(PI);
unsigned Opc = PI->getOpcode();
- int Offset = 0;
+ int64_t Offset = 0;
if ((Opc == X86::ADD64ri32 || Opc == X86::ADD32ri) &&
PI->getOperand(0).getReg() == StackPtr) {
@@ -473,7 +473,7 @@ void X86FrameLowering::emitCalleeSavedFrameMovesFullCFA(
: FramePtr;
unsigned DwarfReg = MRI->getDwarfRegNum(MachineFramePtr, true);
// Offset = space for return address + size of the frame pointer itself.
- unsigned Offset = (Is64Bit ? 8 : 4) + (Uses64BitFramePtr ? 8 : 4);
+ long Offset = (Is64Bit ? 8 : 4) + (Uses64BitFramePtr ? 8 : 4);
BuildCFI(MBB, MBBI, DebugLoc{},
MCCFIInstruction::createOffset(nullptr, DwarfReg, -Offset));
emitCalleeSavedFrameMoves(MBB, MBBI, DebugLoc{}, true);
@@ -1881,7 +1881,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
// For EH funclets, only allocate enough space for outgoing calls. Save the
// NumBytes value that we would've used for the parent frame.
- unsigned ParentFrameNumBytes = NumBytes;
+ uint64_t ParentFrameNumBytes = NumBytes;
if (IsFunclet)
NumBytes = getWinEHFuncletFrameSize(MF);
@@ -2430,7 +2430,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
if (HasFP) {
if (X86FI->hasSwiftAsyncContext()) {
// Discard the context.
- int Offset = 16 + mergeSPUpdates(MBB, MBBI, true);
+ long Offset = 16 + mergeSPUpdates(MBB, MBBI, true);
emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue*/ true);
}
// Pop EBP.
@@ -2562,7 +2562,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
if (!HasFP && NeedsDwarfCFI) {
MBBI = FirstCSPop;
- int64_t Offset = -CSSize - SlotSize;
+ int64_t Offset = -(int64_t)CSSize - SlotSize;
// Mark callee-saved pop instruction.
// Define the current CFA rule to use the provided offset.
while (MBBI != MBB.end()) {
@@ -2591,7 +2591,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
if (Terminator == MBB.end() || !isTailCallOpcode(Terminator->getOpcode())) {
// Add the return addr area delta back since we are not tail calling.
- int Offset = -1 * X86FI->getTCReturnAddrDelta();
+ long Offset = -1 * X86FI->getTCReturnAddrDelta();
assert(Offset >= 0 && "TCDelta should never be positive");
if (Offset) {
// Check for possible merge with preceding ADD instruction.
@@ -2625,7 +2625,7 @@ StackOffset X86FrameLowering::getFrameIndexReference(const MachineFunction &MF,
// object.
// We need to factor in additional offsets applied during the prologue to the
// frame, base, and stack pointer depending on which is used.
- int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
+ int64_t Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
unsigned CSSize = X86FI->getCalleeSavedFrameSize();
uint64_t StackSize = MFI.getStackSize();
@@ -3919,7 +3919,7 @@ MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers(
// FIXME: Don't set FrameSetup flag in catchret case.
int FI = FuncInfo.EHRegNodeFrameIndex;
- int EHRegSize = MFI.getObjectSize(FI);
+ int64_t EHRegSize = MFI.getObjectSize(FI);
if (RestoreSP) {
// MOV32rm -EHRegSize(%ebp), %esp
@@ -3929,8 +3929,8 @@ MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers(
}
Register UsedReg;
- int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg).getFixed();
- int EndOffset = -EHRegOffset - EHRegSize;
+ int64_t EHRegOffset = getFrameIndexReference(MF, FI, UsedReg).getFixed();
+ int64_t EndOffset = -EHRegOffset - EHRegSize;
FuncInfo.EHRegNodeEndOffset = EndOffset;
if (UsedReg == FramePtr) {
@@ -3951,7 +3951,7 @@ MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers(
.setMIFlag(MachineInstr::FrameSetup);
// MOV32rm SavedEBPOffset(%esi), %ebp
assert(X86FI->getHasSEHFramePtrSave());
- int Offset =
+ int64_t Offset =
getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg)
.getFixed();
assert(UsedReg == BasePtr);
diff --git a/llvm/lib/Target/X86/X86FrameLowering.h b/llvm/lib/Target/X86/X86FrameLowering.h
index 2dc9ecc6109d78..0dfff69f9004c0 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.h
+++ b/llvm/lib/Target/X86/X86FrameLowering.h
@@ -137,8 +137,8 @@ class X86FrameLowering : public TargetFrameLowering {
/// it is an ADD/SUB/LEA instruction it is deleted argument and the
/// stack adjustment is returned as a positive value for ADD/LEA and
/// a negative for SUB.
- int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
- bool doMergeWithPrevious) const;
+ long mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
+ bool doMergeWithPrevious) const;
/// Emit a series of instructions to increment / decrement the stack
/// pointer by a constant value.
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index be0cf1596d0d90..57f645462089ed 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -893,7 +893,7 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
// Determine base register and offset.
- int FIOffset;
+ int64_t FIOffset;
Register BasePtr;
if (MI.isReturn()) {
assert((!hasStackRealignment(MF) ||
@@ -946,9 +946,11 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
if (MI.getOperand(FIOperandNum+3).isImm()) {
// Offset is a 32-bit integer.
int Imm = (int)(MI.getOperand(FIOperandNum + 3).getImm());
- int Offset = FIOffset + Imm;
- assert((!Is64Bit || isInt<32>((long long)FIOffset + Imm)) &&
- "Requesting 64-bit offset in 32-bit immediate!");
+ int64_t Offset = FIOffset + Imm;
+ if (!Is64Bit) {
+ assert(isInt<32>((long long)FIOffset + Imm) &&
+ "Requesting 64-bit offset in 32-bit immediate!");
+ }
if (Offset != 0 || !tryOptimizeLEAtoMOV(II))
MI.getOperand(FIOperandNum + 3).ChangeToImmediate(Offset);
} else {
diff --git a/llvm/test/CodeGen/PowerPC/huge-frame-size.ll b/llvm/test/CodeGen/PowerPC/huge-frame-size.ll
index f1039df6f549ae..78bdac021ac8af 100644
--- a/llvm/test/CodeGen/PowerPC/huge-frame-size.ll
+++ b/llvm/test/CodeGen/PowerPC/huge-frame-size.ll
@@ -18,7 +18,7 @@ define void @foo(i8 %x) {
; CHECK-LE-NEXT: oris 0, 0, 65535
; CHECK-LE-NEXT: ori 0, 0, 65504
; CHECK-LE-NEXT: stdux 1, 1, 0
-; CHECK-LE-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-NEXT: .cfi_def_cfa_offset 4294967328
; CHECK-LE-NEXT: li 4, 1
; CHECK-LE-NEXT: addi 5, 1, 32
; CHECK-LE-NEXT: stb 3, 32(1)
diff --git a/llvm/test/CodeGen/X86/huge-stack.ll b/llvm/test/CodeGen/X86/huge-stack.ll
index a140d2511916d8..2ef312a8881560 100644
--- a/llvm/test/CodeGen/X86/huge-stack.ll
+++ b/llvm/test/CodeGen/X86/huge-stack.ll
@@ -14,8 +14,8 @@ define void @foo() unnamed_addr #0 {
; CHECK-LABEL: foo:
; CHECK: movabsq $8589934462, %rax
; CHECK-NEXT: subq %rax, %rsp
-; CHECK-NEXT: .cfi_def_cfa_offset -122
-; CHECK-NEXT: movb $42, -129(%rsp)
+; CHECK-NEXT: .cfi_def_cfa_offset 8589934470
+; CHECK-NEXT: movb $42, 4294967167(%rsp)
; CHECK-NEXT: movb $43, -128(%rsp)
; CHECK-NEXT: movabsq $8589934462, %rax
; CHECK-NEXT: addq %rax, %rsp
>From d5289f8a13f76c020a151bda79da349fa75799d1 Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Thu, 7 Mar 2024 01:01:41 +0000
Subject: [PATCH 3/9] Review feedback: use explicit bitwidth types
---
llvm/include/llvm/CodeGen/MachineFrameInfo.h | 6 ++---
.../llvm/CodeGen/TargetFrameLowering.h | 4 ++--
llvm/include/llvm/MC/MCDwarf.h | 22 +++++++++----------
llvm/lib/CodeGen/CFIInstrInserter.cpp | 10 ++++-----
llvm/lib/CodeGen/MachineFrameInfo.cpp | 2 +-
llvm/lib/CodeGen/PrologEpilogInserter.cpp | 4 ++--
llvm/lib/MC/MCDwarf.cpp | 6 ++---
.../MCTargetDesc/AArch64AsmBackend.cpp | 4 ++--
.../Target/Hexagon/HexagonFrameLowering.cpp | 4 ++--
.../Target/X86/MCTargetDesc/X86AsmBackend.cpp | 4 ++--
.../X86/MCTargetDesc/X86MCCodeEmitter.cpp | 13 ++++++-----
llvm/lib/Target/X86/X86FrameLowering.cpp | 12 +++++-----
llvm/lib/Target/X86/X86FrameLowering.h | 5 +++--
13 files changed, 49 insertions(+), 47 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineFrameInfo.h b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
index 243b124d89ff40..461b963e7fac40 100644
--- a/llvm/include/llvm/CodeGen/MachineFrameInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
@@ -280,7 +280,7 @@ class MachineFrameInfo {
/// setup/destroy pseudo instructions (as defined in the TargetFrameInfo
/// class). This information is important for frame pointer elimination.
/// It is only valid during and after prolog/epilog code insertion.
- unsigned long MaxCallFrameSize = ~0ul;
+ uint64_t MaxCallFrameSize = ~0ul;
/// The number of bytes of callee saved registers that the target wants to
/// report for the current function in the CodeView S_FRAMEPROC record.
@@ -651,7 +651,7 @@ class MachineFrameInfo {
/// CallFrameSetup/Destroy pseudo instructions are used by the target, and
/// then only during or after prolog/epilog code insertion.
///
- unsigned long getMaxCallFrameSize() const {
+ uint64_t getMaxCallFrameSize() const {
// TODO: Enable this assert when targets are fixed.
//assert(isMaxCallFrameSizeComputed() && "MaxCallFrameSize not computed yet");
if (!isMaxCallFrameSizeComputed())
@@ -659,7 +659,7 @@ class MachineFrameInfo {
return MaxCallFrameSize;
}
bool isMaxCallFrameSizeComputed() const { return MaxCallFrameSize != ~0ul; }
- void setMaxCallFrameSize(unsigned long S) { MaxCallFrameSize = S; }
+ void setMaxCallFrameSize(uint64_t S) { MaxCallFrameSize = S; }
/// Returns how many bytes of callee-saved registers the target pushed in the
/// prologue. Only used for debug info.
diff --git a/llvm/include/llvm/CodeGen/TargetFrameLowering.h b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
index a256574d9d2bee..72978b2f746d76 100644
--- a/llvm/include/llvm/CodeGen/TargetFrameLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
@@ -51,7 +51,7 @@ class TargetFrameLowering {
// Maps a callee saved register to a stack slot with a fixed offset.
struct SpillSlot {
unsigned Reg;
- long Offset; // Offset relative to stack pointer on function entry.
+ int64_t Offset; // Offset relative to stack pointer on function entry.
};
struct DwarfFrameBase {
@@ -66,7 +66,7 @@ class TargetFrameLowering {
// Used with FrameBaseKind::Register.
unsigned Reg;
// Used with FrameBaseKind::CFA.
- long Offset;
+ int64_t Offset;
struct WasmFrameBase WasmLoc;
} Location;
};
diff --git a/llvm/include/llvm/MC/MCDwarf.h b/llvm/include/llvm/MC/MCDwarf.h
index e39c44f38a342a..1203257f494358 100644
--- a/llvm/include/llvm/MC/MCDwarf.h
+++ b/llvm/include/llvm/MC/MCDwarf.h
@@ -508,7 +508,7 @@ class MCCFIInstruction {
MCSymbol *Label;
unsigned Register;
union {
- long Offset;
+ int64_t Offset;
unsigned Register2;
};
unsigned AddressSpace = ~0u;
@@ -516,7 +516,7 @@ class MCCFIInstruction {
std::vector<char> Values;
std::string Comment;
- MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, long O, SMLoc Loc,
+ MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, SMLoc Loc,
StringRef V = "", StringRef Comment = "")
: Operation(Op), Label(L), Register(R), Offset(O), Loc(Loc),
Values(V.begin(), V.end()), Comment(Comment) {
@@ -528,7 +528,7 @@ class MCCFIInstruction {
assert(Op == OpRegister);
}
- MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, long O, unsigned AS,
+ MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int64_t O, unsigned AS,
SMLoc Loc)
: Operation(Op), Label(L), Register(R), Offset(O), AddressSpace(AS),
Loc(Loc) {
@@ -538,8 +538,8 @@ class MCCFIInstruction {
public:
/// .cfi_def_cfa defines a rule for computing CFA as: take address from
/// Register and add Offset to it.
- static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, long Offset,
- SMLoc Loc = {}) {
+ static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register,
+ int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfa, L, Register, Offset, Loc);
}
@@ -553,7 +553,7 @@ class MCCFIInstruction {
/// .cfi_def_cfa_offset modifies a rule for computing CFA. Register
/// remains the same, but offset is new. Note that it is the absolute offset
/// that will be added to a defined register to the compute CFA address.
- static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, long Offset,
+ static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset,
SMLoc Loc = {}) {
return MCCFIInstruction(OpDefCfaOffset, L, 0, Offset, Loc);
}
@@ -561,7 +561,7 @@ class MCCFIInstruction {
/// .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but
/// Offset is a relative value that is added/subtracted from the previous
/// offset.
- static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, long Adjustment,
+ static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment,
SMLoc Loc = {}) {
return MCCFIInstruction(OpAdjustCfaOffset, L, 0, Adjustment, Loc);
}
@@ -581,7 +581,7 @@ class MCCFIInstruction {
/// .cfi_offset Previous value of Register is saved at offset Offset
/// from CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register,
- long Offset, SMLoc Loc = {}) {
+ int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpOffset, L, Register, Offset, Loc);
}
@@ -589,7 +589,7 @@ class MCCFIInstruction {
/// Offset from the current CFA register. This is transformed to .cfi_offset
/// using the known displacement of the CFA register from the CFA.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register,
- long Offset, SMLoc Loc = {}) {
+ int64_t Offset, SMLoc Loc = {}) {
return MCCFIInstruction(OpRelOffset, L, Register, Offset, Loc);
}
@@ -650,7 +650,7 @@ class MCCFIInstruction {
}
/// A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE
- static MCCFIInstruction createGnuArgsSize(MCSymbol *L, long Size,
+ static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int64_t Size,
SMLoc Loc = {}) {
return MCCFIInstruction(OpGnuArgsSize, L, 0, Size, Loc);
}
@@ -677,7 +677,7 @@ class MCCFIInstruction {
return AddressSpace;
}
- long getOffset() const {
+ int64_t getOffset() const {
assert(Operation == OpDefCfa || Operation == OpOffset ||
Operation == OpRelOffset || Operation == OpDefCfaOffset ||
Operation == OpAdjustCfaOffset || Operation == OpGnuArgsSize ||
diff --git a/llvm/lib/CodeGen/CFIInstrInserter.cpp b/llvm/lib/CodeGen/CFIInstrInserter.cpp
index 06c4686caba96d..776cc13ccd20b2 100644
--- a/llvm/lib/CodeGen/CFIInstrInserter.cpp
+++ b/llvm/lib/CodeGen/CFIInstrInserter.cpp
@@ -68,9 +68,9 @@ class CFIInstrInserter : public MachineFunctionPass {
struct MBBCFAInfo {
MachineBasicBlock *MBB;
/// Value of cfa offset valid at basic block entry.
- long IncomingCFAOffset = -1;
+ int64_t IncomingCFAOffset = -1;
/// Value of cfa offset valid at basic block exit.
- long OutgoingCFAOffset = -1;
+ int64_t OutgoingCFAOffset = -1;
/// Value of cfa register valid at basic block entry.
unsigned IncomingCFARegister = 0;
/// Value of cfa register valid at basic block exit.
@@ -120,7 +120,7 @@ class CFIInstrInserter : public MachineFunctionPass {
/// Return the cfa offset value that should be set at the beginning of a MBB
/// if needed. The negated value is needed when creating CFI instructions that
/// set absolute offset.
- long getCorrectCFAOffset(MachineBasicBlock *MBB) {
+ int64_t getCorrectCFAOffset(MachineBasicBlock *MBB) {
return MBBVector[MBB->getNumber()].IncomingCFAOffset;
}
@@ -175,7 +175,7 @@ void CFIInstrInserter::calculateCFAInfo(MachineFunction &MF) {
void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
// Outgoing cfa offset set by the block.
- long SetOffset = MBBInfo.IncomingCFAOffset;
+ int64_t SetOffset = MBBInfo.IncomingCFAOffset;
// Outgoing cfa register set by the block.
unsigned SetRegister = MBBInfo.IncomingCFARegister;
MachineFunction *MF = MBBInfo.MBB->getParent();
@@ -188,7 +188,7 @@ void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
for (MachineInstr &MI : *MBBInfo.MBB) {
if (MI.isCFIInstruction()) {
std::optional<unsigned> CSRReg;
- std::optional<long> CSROffset;
+ std::optional<int64_t> CSROffset;
unsigned CFIIndex = MI.getOperand(0).getCFIIndex();
const MCCFIInstruction &CFI = Instrs[CFIIndex];
switch (CFI.getOperation()) {
diff --git a/llvm/lib/CodeGen/MachineFrameInfo.cpp b/llvm/lib/CodeGen/MachineFrameInfo.cpp
index d7dc2a926f56e2..8b1ac0e6c7f3b2 100644
--- a/llvm/lib/CodeGen/MachineFrameInfo.cpp
+++ b/llvm/lib/CodeGen/MachineFrameInfo.cpp
@@ -196,7 +196,7 @@ void MachineFrameInfo::computeMaxCallFrameSize(const MachineFunction &MF) {
for (const MachineInstr &MI : MBB) {
unsigned Opcode = MI.getOpcode();
if (Opcode == FrameSetupOpcode || Opcode == FrameDestroyOpcode) {
- unsigned long Size = TII.getFrameSize(MI);
+ uint64_t Size = TII.getFrameSize(MI);
MaxCallFrameSize = std::max(MaxCallFrameSize, Size);
AdjustsStack = true;
} else if (MI.isInlineAsm()) {
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 1193a79ee0b308..0d05d5ffab1e8b 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -358,7 +358,7 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) {
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
MachineFrameInfo &MFI = MF.getFrameInfo();
- unsigned long MaxCallFrameSize = 0;
+ uint64_t MaxCallFrameSize = 0;
bool AdjustsStack = MFI.adjustsStack();
// Get the function call frame set-up and tear-down instruction opcode
@@ -374,7 +374,7 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) {
for (MachineBasicBlock &BB : MF)
for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I)
if (TII.isFrameInstr(*I)) {
- unsigned long Size = TII.getFrameSize(*I);
+ uint64_t Size = TII.getFrameSize(*I);
if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
AdjustsStack = true;
FrameSDOps.push_back(I);
diff --git a/llvm/lib/MC/MCDwarf.cpp b/llvm/lib/MC/MCDwarf.cpp
index 9cb26596e82250..b2df5f5e76fe69 100644
--- a/llvm/lib/MC/MCDwarf.cpp
+++ b/llvm/lib/MC/MCDwarf.cpp
@@ -1293,8 +1293,8 @@ static void EmitPersonality(MCStreamer &streamer, const MCSymbol &symbol,
namespace {
class FrameEmitterImpl {
- long CFAOffset = 0;
- long InitialCFAOffset = 0;
+ int64_t CFAOffset = 0;
+ int64_t InitialCFAOffset = 0;
bool IsEH;
MCObjectStreamer &Streamer;
@@ -1408,7 +1408,7 @@ void FrameEmitterImpl::emitCFIInstruction(const MCCFIInstruction &Instr) {
if (!IsEH)
Reg = MRI->getDwarfRegNumFromDwarfEHRegNum(Reg);
- long Offset = Instr.getOffset();
+ int64_t Offset = Instr.getOffset();
if (IsRelative)
Offset -= CFAOffset;
Offset = Offset / dataAlignmentFactor;
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index cdb4ddf471d418..d83f7b5690eec6 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -612,10 +612,10 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
return CU::UNWIND_ARM64_MODE_DWARF;
bool HasFP = false;
- unsigned long StackSize = 0;
+ uint64_t StackSize = 0;
uint64_t CompactUnwindEncoding = 0;
- long CurOffset = 0;
+ int64_t CurOffset = 0;
for (size_t i = 0, e = Instrs.size(); i != e; ++i) {
const MCCFIInstruction &Inst = Instrs[i];
diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index 104de12a95404e..394456c13e6812 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -1660,7 +1660,7 @@ bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
using SpillSlot = TargetFrameLowering::SpillSlot;
unsigned NumFixed;
- long MinOffset = 0; // CS offsets are negative.
+ int64_t MinOffset = 0; // CS offsets are negative.
const SpillSlot *FixedSlots = getCalleeSavedSpillSlots(NumFixed);
for (const SpillSlot *S = FixedSlots; S != FixedSlots+NumFixed; ++S) {
if (!SRegs[S->Reg])
@@ -1679,7 +1679,7 @@ bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
Register R = x;
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(R);
unsigned Size = TRI->getSpillSize(*RC);
- long Off = MinOffset - Size;
+ int64_t Off = MinOffset - Size;
Align Alignment = std::min(TRI->getSpillAlign(*RC), getStackAlign());
Off &= -Alignment.value();
int FI = MFI.CreateFixedSpillStackObject(Size, Off);
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index bb9eb3a6b47eef..f25aef3e52b4e1 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -1348,8 +1348,8 @@ class DarwinX86AsmBackend : public X86AsmBackend {
unsigned SubtractInstrIdx = Is64Bit ? 3 : 2;
unsigned InstrOffset = 0;
unsigned StackAdjust = 0;
- unsigned long StackSize = 0;
- long MinAbsOffset = std::numeric_limits<long>::max();
+ uint64_t StackSize = 0;
+ int64_t MinAbsOffset = std::numeric_limits<long>::max();
for (const MCCFIInstruction &Inst : Instrs) {
switch (Inst.getOperation()) {
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 1a17e32291598c..3c1d42488fc6a4 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -350,7 +350,7 @@ class X86MCCodeEmitter : public MCCodeEmitter {
MCFixupKind FixupKind, uint64_t StartByte,
SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
- long ImmOffset = 0) const;
+ int64_t ImmOffset = 0) const;
void emitRegModRMByte(const MCOperand &ModRMReg, unsigned RegOpcodeFld,
SmallVectorImpl<char> &CB) const;
@@ -404,7 +404,8 @@ static void emitConstant(uint64_t Val, unsigned Size,
/// Determine if this immediate can fit in a disp8 or a compressed disp8 for
/// EVEX instructions. \p will be set to the value to pass to the ImmOffset
/// parameter of emitImmediate.
-static bool isDispOrCDisp8(uint64_t TSFlags, long Value, long &ImmOffset) {
+static bool isDispOrCDisp8(uint64_t TSFlags, int64_t Value,
+ int64_t &ImmOffset) {
bool HasEVEX = (TSFlags & X86II::EncodingMask) == X86II::EVEX;
unsigned CD8_Scale =
@@ -417,7 +418,7 @@ static bool isDispOrCDisp8(uint64_t TSFlags, long Value, long &ImmOffset) {
if (Value & (CD8_Scale - 1)) // Unaligned offset
return false;
- long CDisp8 = Value / static_cast<int>(CD8_Scale);
+ int64_t CDisp8 = Value / static_cast<int64_t>(CD8_Scale);
if (!isInt<8>(CDisp8))
return false;
@@ -510,7 +511,7 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
uint64_t StartByte,
SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
- long ImmOffset) const {
+ int64_t ImmOffset) const {
const MCExpr *Expr = nullptr;
if (DispOp.isImm()) {
// If this is a simple integer displacement that doesn't require a
@@ -791,7 +792,7 @@ void X86MCCodeEmitter::emitMemModRMByte(
// This also handles the 0 displacement for [EBP], [R13], [R21] or [R29]. We
// can't use disp8 if the {disp32} pseudo prefix is present.
if (Disp.isImm() && AllowDisp8) {
- long ImmOffset = 0;
+ int64_t ImmOffset = 0;
if (isDispOrCDisp8(TSFlags, Disp.getImm(), ImmOffset)) {
emitByte(modRMByte(1, RegOpcodeField, BaseRegNo), CB);
emitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, StartByte, CB, Fixups,
@@ -818,7 +819,7 @@ void X86MCCodeEmitter::emitMemModRMByte(
bool ForceDisp32 = false;
bool ForceDisp8 = false;
- long ImmOffset = 0;
+ int64_t ImmOffset = 0;
if (BaseReg == 0) {
// If there is no base register, we emit the special case SIB byte with
// MOD=0, BASE=5, to JUST get the index, scale, and displacement.
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index c226c91a340b0a..3e44ed621fdff4 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -380,9 +380,9 @@ MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
return MI;
}
-long X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &MBBI,
- bool doMergeWithPrevious) const {
+int64_t X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ bool doMergeWithPrevious) const {
if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
(!doMergeWithPrevious && MBBI == MBB.end()))
return 0;
@@ -473,7 +473,7 @@ void X86FrameLowering::emitCalleeSavedFrameMovesFullCFA(
: FramePtr;
unsigned DwarfReg = MRI->getDwarfRegNum(MachineFramePtr, true);
// Offset = space for return address + size of the frame pointer itself.
- long Offset = (Is64Bit ? 8 : 4) + (Uses64BitFramePtr ? 8 : 4);
+ int64_t Offset = (Is64Bit ? 8 : 4) + (Uses64BitFramePtr ? 8 : 4);
BuildCFI(MBB, MBBI, DebugLoc{},
MCCFIInstruction::createOffset(nullptr, DwarfReg, -Offset));
emitCalleeSavedFrameMoves(MBB, MBBI, DebugLoc{}, true);
@@ -2430,7 +2430,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
if (HasFP) {
if (X86FI->hasSwiftAsyncContext()) {
// Discard the context.
- long Offset = 16 + mergeSPUpdates(MBB, MBBI, true);
+ int64_t Offset = 16 + mergeSPUpdates(MBB, MBBI, true);
emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue*/ true);
}
// Pop EBP.
@@ -2591,7 +2591,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
if (Terminator == MBB.end() || !isTailCallOpcode(Terminator->getOpcode())) {
// Add the return addr area delta back since we are not tail calling.
- long Offset = -1 * X86FI->getTCReturnAddrDelta();
+ int64_t Offset = -1 * X86FI->getTCReturnAddrDelta();
assert(Offset >= 0 && "TCDelta should never be positive");
if (Offset) {
// Check for possible merge with preceding ADD instruction.
diff --git a/llvm/lib/Target/X86/X86FrameLowering.h b/llvm/lib/Target/X86/X86FrameLowering.h
index 0dfff69f9004c0..49580b31d39c7b 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.h
+++ b/llvm/lib/Target/X86/X86FrameLowering.h
@@ -137,8 +137,9 @@ class X86FrameLowering : public TargetFrameLowering {
/// it is an ADD/SUB/LEA instruction it is deleted argument and the
/// stack adjustment is returned as a positive value for ADD/LEA and
/// a negative for SUB.
- long mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
- bool doMergeWithPrevious) const;
+ int64_t mergeSPUpdates(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &MBBI,
+ bool doMergeWithPrevious) const;
/// Emit a series of instructions to increment / decrement the stack
/// pointer by a constant value.
>From 36b7bc1bef36d7e24d6f9ea8b3c689014320b3f9 Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Thu, 7 Mar 2024 03:35:27 +0000
Subject: [PATCH 4/9] Placate msvc
---
llvm/include/llvm/MC/MCDwarf.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/llvm/include/llvm/MC/MCDwarf.h b/llvm/include/llvm/MC/MCDwarf.h
index 1203257f494358..9062266a71c37b 100644
--- a/llvm/include/llvm/MC/MCDwarf.h
+++ b/llvm/include/llvm/MC/MCDwarf.h
@@ -547,7 +547,7 @@ class MCCFIInstruction {
/// on Register will be used instead of the old one. Offset remains the same.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpDefCfaRegister, L, Register, 0L, Loc);
+ return MCCFIInstruction(OpDefCfaRegister, L, Register, (int64_t)0, Loc);
}
/// .cfi_def_cfa_offset modifies a rule for computing CFA. Register
@@ -602,12 +602,12 @@ class MCCFIInstruction {
/// .cfi_window_save SPARC register window is saved.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpWindowSave, L, 0, 0L, Loc);
+ return MCCFIInstruction(OpWindowSave, L, 0, (int64_t)0, Loc);
}
/// .cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpNegateRAState, L, 0, 0L, Loc);
+ return MCCFIInstruction(OpNegateRAState, L, 0, (int64_t)0, Loc);
}
/// .cfi_restore says that the rule for Register is now the same as it
@@ -615,31 +615,31 @@ class MCCFIInstruction {
/// by .cfi_startproc were executed.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpRestore, L, Register, 0L, Loc);
+ return MCCFIInstruction(OpRestore, L, Register, (int64_t)0, Loc);
}
/// .cfi_undefined From now on the previous value of Register can't be
/// restored anymore.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpUndefined, L, Register, 0L, Loc);
+ return MCCFIInstruction(OpUndefined, L, Register, (int64_t)0, Loc);
}
/// .cfi_same_value Current value of Register is the same as in the
/// previous frame. I.e., no restoration is needed.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpSameValue, L, Register, 0L, Loc);
+ return MCCFIInstruction(OpSameValue, L, Register, (int64_t)0, Loc);
}
/// .cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpRememberState, L, 0, 0L, Loc);
+ return MCCFIInstruction(OpRememberState, L, 0, (int64_t)0, Loc);
}
/// .cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpRestoreState, L, 0, 0L, Loc);
+ return MCCFIInstruction(OpRestoreState, L, 0, (int64_t)0, Loc);
}
/// .cfi_escape Allows the user to add arbitrary bytes to the unwind
>From 551126472911accae9d416088cceb6de15107f54 Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Thu, 7 Mar 2024 13:52:18 +0000
Subject: [PATCH 5/9] Review feedback: use integer constant function macros
---
llvm/include/llvm/CodeGen/MachineFrameInfo.h | 6 ++++--
llvm/include/llvm/MC/MCDwarf.h | 16 ++++++++--------
2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineFrameInfo.h b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
index 461b963e7fac40..05b3f276da4e64 100644
--- a/llvm/include/llvm/CodeGen/MachineFrameInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineFrameInfo.h
@@ -280,7 +280,7 @@ class MachineFrameInfo {
/// setup/destroy pseudo instructions (as defined in the TargetFrameInfo
/// class). This information is important for frame pointer elimination.
/// It is only valid during and after prolog/epilog code insertion.
- uint64_t MaxCallFrameSize = ~0ul;
+ uint64_t MaxCallFrameSize = ~UINT64_C(0);
/// The number of bytes of callee saved registers that the target wants to
/// report for the current function in the CodeView S_FRAMEPROC record.
@@ -658,7 +658,9 @@ class MachineFrameInfo {
return 0;
return MaxCallFrameSize;
}
- bool isMaxCallFrameSizeComputed() const { return MaxCallFrameSize != ~0ul; }
+ bool isMaxCallFrameSizeComputed() const {
+ return MaxCallFrameSize != ~UINT64_C(0);
+ }
void setMaxCallFrameSize(uint64_t S) { MaxCallFrameSize = S; }
/// Returns how many bytes of callee-saved registers the target pushed in the
diff --git a/llvm/include/llvm/MC/MCDwarf.h b/llvm/include/llvm/MC/MCDwarf.h
index 9062266a71c37b..150b48eedc3715 100644
--- a/llvm/include/llvm/MC/MCDwarf.h
+++ b/llvm/include/llvm/MC/MCDwarf.h
@@ -547,7 +547,7 @@ class MCCFIInstruction {
/// on Register will be used instead of the old one. Offset remains the same.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpDefCfaRegister, L, Register, (int64_t)0, Loc);
+ return MCCFIInstruction(OpDefCfaRegister, L, Register, INT64_C(0), Loc);
}
/// .cfi_def_cfa_offset modifies a rule for computing CFA. Register
@@ -602,12 +602,12 @@ class MCCFIInstruction {
/// .cfi_window_save SPARC register window is saved.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpWindowSave, L, 0, (int64_t)0, Loc);
+ return MCCFIInstruction(OpWindowSave, L, 0, INT64_C(0), Loc);
}
/// .cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpNegateRAState, L, 0, (int64_t)0, Loc);
+ return MCCFIInstruction(OpNegateRAState, L, 0, INT64_C(0), Loc);
}
/// .cfi_restore says that the rule for Register is now the same as it
@@ -615,31 +615,31 @@ class MCCFIInstruction {
/// by .cfi_startproc were executed.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpRestore, L, Register, (int64_t)0, Loc);
+ return MCCFIInstruction(OpRestore, L, Register, INT64_C(0), Loc);
}
/// .cfi_undefined From now on the previous value of Register can't be
/// restored anymore.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpUndefined, L, Register, (int64_t)0, Loc);
+ return MCCFIInstruction(OpUndefined, L, Register, INT64_C(0), Loc);
}
/// .cfi_same_value Current value of Register is the same as in the
/// previous frame. I.e., no restoration is needed.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register,
SMLoc Loc = {}) {
- return MCCFIInstruction(OpSameValue, L, Register, (int64_t)0, Loc);
+ return MCCFIInstruction(OpSameValue, L, Register, INT64_C(0), Loc);
}
/// .cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpRememberState, L, 0, (int64_t)0, Loc);
+ return MCCFIInstruction(OpRememberState, L, 0, INT64_C(0), Loc);
}
/// .cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc = {}) {
- return MCCFIInstruction(OpRestoreState, L, 0, (int64_t)0, Loc);
+ return MCCFIInstruction(OpRestoreState, L, 0, INT64_C(0), Loc);
}
/// .cfi_escape Allows the user to add arbitrary bytes to the unwind
>From b5fea5b6e6a04cd66085e42ded1c32676aacd074 Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Thu, 7 Mar 2024 20:00:00 +0000
Subject: [PATCH 6/9] Attempt to fix msvc build
---
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index f25aef3e52b4e1..4855c6a93ae65f 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -1349,7 +1349,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
unsigned InstrOffset = 0;
unsigned StackAdjust = 0;
uint64_t StackSize = 0;
- int64_t MinAbsOffset = std::numeric_limits<long>::max();
+ int64_t MinAbsOffset = std::numeric_limits<int64_t>::max();
for (const MCCFIInstruction &Inst : Instrs) {
switch (Inst.getOperation()) {
@@ -1419,7 +1419,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
unsigned Reg = *MRI.getLLVMRegNum(Inst.getRegister(), true);
SavedRegs[SavedRegIdx++] = Reg;
StackAdjust += OffsetSize;
- MinAbsOffset = std::min(MinAbsOffset, labs(Inst.getOffset()));
+ MinAbsOffset = std::min<int64_t>(MinAbsOffset, llabs(Inst.getOffset()));
InstrOffset += PushInstrSize(Reg);
break;
}
>From bfa15e812df45ee63d5c84f53a49b340cffd8738 Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Fri, 8 Mar 2024 01:26:28 +0000
Subject: [PATCH 7/9] Review feedback: use opaque ptrs
---
llvm/test/CodeGen/X86/huge-stack.ll | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/test/CodeGen/X86/huge-stack.ll b/llvm/test/CodeGen/X86/huge-stack.ll
index 2ef312a8881560..6b0103d8b3afb3 100644
--- a/llvm/test/CodeGen/X86/huge-stack.ll
+++ b/llvm/test/CodeGen/X86/huge-stack.ll
@@ -4,10 +4,10 @@
define void @foo() unnamed_addr #0 {
%1 = alloca %large, align 1
%2 = alloca %large, align 1
- %3 = getelementptr inbounds %large, %large* %1, i64 0, i64 0
- store i8 42, i8* %3, align 1
- %4 = getelementptr inbounds %large, %large* %2, i64 0, i64 0
- store i8 43, i8* %4, align 1
+ %3 = getelementptr inbounds %large, ptr %1, i64 0, i64 0
+ store i8 42, ptr %3, align 1
+ %4 = getelementptr inbounds %large, ptr %2, i64 0, i64 0
+ store i8 43, ptr %4, align 1
ret void
}
>From 435e7f259918ba252e28d44c706d0b594fbe1aa4 Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Fri, 8 Mar 2024 01:31:25 +0000
Subject: [PATCH 8/9] Review feedback: autogenerate test
---
llvm/test/CodeGen/X86/huge-stack.ll | 22 ++++++++++++----------
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/llvm/test/CodeGen/X86/huge-stack.ll b/llvm/test/CodeGen/X86/huge-stack.ll
index 6b0103d8b3afb3..10219990840f7d 100644
--- a/llvm/test/CodeGen/X86/huge-stack.ll
+++ b/llvm/test/CodeGen/X86/huge-stack.ll
@@ -1,7 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -O0 -mtriple=x86_64 < %s | FileCheck %s --check-prefix=CHECK
%large = type [4294967295 x i8]
define void @foo() unnamed_addr #0 {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movabsq $8589934462, %rax # imm = 0x1FFFFFF7E
+; CHECK-NEXT: subq %rax, %rsp
+; CHECK-NEXT: .cfi_def_cfa_offset 8589934470
+; CHECK-NEXT: movb $42, {{[0-9]+}}(%rsp)
+; CHECK-NEXT: movb $43, -{{[0-9]+}}(%rsp)
+; CHECK-NEXT: movabsq $8589934462, %rax # imm = 0x1FFFFFF7E
+; CHECK-NEXT: addq %rax, %rsp
+; CHECK-NEXT: .cfi_def_cfa_offset 8
+; CHECK-NEXT: retq
%1 = alloca %large, align 1
%2 = alloca %large, align 1
%3 = getelementptr inbounds %large, ptr %1, i64 0, i64 0
@@ -10,13 +22,3 @@ define void @foo() unnamed_addr #0 {
store i8 43, ptr %4, align 1
ret void
}
-
-; CHECK-LABEL: foo:
-; CHECK: movabsq $8589934462, %rax
-; CHECK-NEXT: subq %rax, %rsp
-; CHECK-NEXT: .cfi_def_cfa_offset 8589934470
-; CHECK-NEXT: movb $42, 4294967167(%rsp)
-; CHECK-NEXT: movb $43, -128(%rsp)
-; CHECK-NEXT: movabsq $8589934462, %rax
-; CHECK-NEXT: addq %rax, %rsp
-; CHECK-NEXT: .cfi_def_cfa_offset 8
>From 2db6e9a9323865dcd36dd8e294b3c764834918e4 Mon Sep 17 00:00:00 2001
From: Wesley Wiser <wwiser at gmail.com>
Date: Sat, 9 Mar 2024 23:05:03 +0000
Subject: [PATCH 9/9] Review feedback: long -> int64_t
---
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 4855c6a93ae65f..4dbeb4de1c73dd 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -1376,7 +1376,7 @@ class DarwinX86AsmBackend : public X86AsmBackend {
memset(SavedRegs, 0, sizeof(SavedRegs));
StackAdjust = 0;
SavedRegIdx = 0;
- MinAbsOffset = std::numeric_limits<long>::max();
+ MinAbsOffset = std::numeric_limits<int64_t>::max();
InstrOffset += MoveInstrSize;
break;
}
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