[llvm] [NVPTX] Add support for atomic add for f16 type (PR #84295)

[Artem Belevich via llvm-commits]

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@@ -6100,6 +6100,8 @@ NVPTXTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
 
   if (AI->isFloatingPointOperation()) {
     if (AI->getOperation() == AtomicRMWInst::BinOp::FAdd) {
+      if (Ty->isHalfTy() && STI.getSmVersion() >= 70)
+        return AtomicExpansionKind::None;
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Artem-B wrote:

It also requires PTX ISA 6.3.

https://github.com/llvm/llvm-project/pull/84295