[llvm] [SelectionDAG] Switch to LiveRegUnits (PR #84197)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 7 08:35:52 PST 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/84197
>From 1f835c2f458d44c51dd377ca4fa4e04618fcb7b6 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Wed, 6 Mar 2024 11:59:55 -0500
Subject: [PATCH 1/2] [SelectionDAG] Switch to LiveRegUnits
---
llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h | 4 +-
llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 6 +-
.../CodeGen/AArch64/live-debugvalues-sve.mir | 7 +-
.../AArch64/misched-branch-targets.mir | 12 +-
llvm/test/CodeGen/AMDGPU/add.ll | 6 -
llvm/test/CodeGen/AMDGPU/bundle-latency.mir | 8 +-
llvm/test/CodeGen/AMDGPU/ctpop16.ll | 4 -
llvm/test/CodeGen/AMDGPU/ctpop64.ll | 3 -
.../CodeGen/AMDGPU/fold-reload-into-exec.mir | 18 +--
.../CodeGen/AMDGPU/fold-reload-into-m0.mir | 6 +-
.../CodeGen/AMDGPU/insert-waitcnts-crash.ll | 18 +--
.../AMDGPU/llvm.amdgcn.set.inactive.ll | 1 -
.../test/CodeGen/AMDGPU/misched-killflags.mir | 6 +-
llvm/test/CodeGen/AMDGPU/mul.ll | 6 -
.../post-ra-sched-kill-bundle-use-inst.mir | 4 +-
.../CodeGen/AMDGPU/power-sched-no-cycle.mir | 2 +-
.../CodeGen/AMDGPU/sched-barrier-post-RA.mir | 12 +-
.../CodeGen/AMDGPU/splitkit-copy-bundle.mir | 4 +-
llvm/test/CodeGen/AMDGPU/syncscopes.ll | 2 +-
.../transform-block-with-return-to-epilog.ll | 32 ++---
llvm/test/CodeGen/AMDGPU/vopd-combine.mir | 134 ++++++++----------
.../CodeGen/ARM/machine-outliner-thunk.ll | 52 +++----
.../PowerPC/fold-frame-offset-using-rr.mir | 16 +--
23 files changed, 159 insertions(+), 204 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
index 85de18f5169e5e..32ff15fc75936a 100644
--- a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
+++ b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
@@ -20,7 +20,7 @@
#include "llvm/ADT/SparseMultiSet.h"
#include "llvm/ADT/SparseSet.h"
#include "llvm/ADT/identity.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
+#include "llvm/CodeGen/LiveRegUnits.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
@@ -263,7 +263,7 @@ namespace llvm {
MachineInstr *FirstDbgValue = nullptr;
/// Set of live physical registers for updating kill flags.
- LivePhysRegs LiveRegs;
+ LiveRegUnits LiveRegs;
public:
explicit ScheduleDAGInstrs(MachineFunction &mf,
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
index 0190fa345eb363..75edaef27001d3 100644
--- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -1103,7 +1103,7 @@ void ScheduleDAGInstrs::reduceHugeMemNodeMaps(Value2SUsMap &stores,
dbgs() << "Loading SUnits:\n"; loads.dump());
}
-static void toggleKills(const MachineRegisterInfo &MRI, LivePhysRegs &LiveRegs,
+static void toggleKills(const MachineRegisterInfo &MRI, LiveRegUnits &LiveRegs,
MachineInstr &MI, bool addToLiveRegs) {
for (MachineOperand &MO : MI.operands()) {
if (!MO.isReg() || !MO.readsReg())
@@ -1113,7 +1113,7 @@ static void toggleKills(const MachineRegisterInfo &MRI, LivePhysRegs &LiveRegs,
continue;
// Things that are available after the instruction are killed by it.
- bool IsKill = LiveRegs.available(MRI, Reg);
+ bool IsKill = LiveRegs.available(Reg);
MO.setIsKill(IsKill);
if (addToLiveRegs)
LiveRegs.addReg(Reg);
@@ -1144,7 +1144,7 @@ void ScheduleDAGInstrs::fixupKills(MachineBasicBlock &MBB) {
continue;
LiveRegs.removeReg(Reg);
} else if (MO.isRegMask()) {
- LiveRegs.removeRegsInMask(MO);
+ LiveRegs.removeRegsNotPreserved(MO.getRegMask());
}
}
diff --git a/llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir b/llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir
index 612453ab53f438..88f1304c8b076c 100644
--- a/llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir
+++ b/llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir
@@ -1,8 +1,5 @@
# RUN: llc -start-before=prologepilog -stop-after=livedebugvalues -mattr=+sve -o - %s | FileCheck %s
-#
-# FIXME: re-enable this run line when InstrRef LiveDebugValues is able to
-# rely on the target spill/restore inst recognisers.
-# run: llc -start-before=prologepilog -stop-after=livedebugvalues -experimental-debug-variable-locations -mattr=+sve -o - %s | FileCheck %s
+# RUN: llc -start-before=prologepilog -stop-after=livedebugvalues -experimental-debug-variable-locations -mattr=+sve -o - %s | FileCheck %s
#
# Test that the LiveDebugValues pass can correctly handle the address
# of the SVE spill (at a scalable address location) which is expressed
@@ -17,7 +14,7 @@
# correctly recognize debug-value !27 is in $z1 after the following reload:
#
# CHECK: renamable $z1 = LD1W_IMM renamable $p0, $fp, -[[#OFFSET]], debug-location !34 :: (load unknown-size from %stack.0, align 16)
-# CHECK-DAG: ST1W_IMM killed renamable $z3, killed renamable $p0, $fp, -[[#OFFSET]] :: (store unknown-size into %stack.0, align 16)
+# CHECK-DAG: ST1W_IMM killed renamable $z3, killed renamable $p0, killed $fp, -[[#OFFSET]] :: (store unknown-size into %stack.0, align 16)
# CHECK-DAG: DBG_VALUE $noreg, $noreg, !27, !DIExpression(), debug-location !30
--- |
diff --git a/llvm/test/CodeGen/AArch64/misched-branch-targets.mir b/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
index 40f148438e537d..e1445d13c2f2b8 100644
--- a/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
+++ b/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
@@ -65,7 +65,7 @@ body: |
# CHECK-NEXT: bb.0.entry:
# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr
#
-# CHECK: frame-setup PAUTH_PROLOGUE implicit-def $lr, implicit {{.*}}$lr, implicit $sp
+# CHECK: frame-setup PAUTH_PROLOGUE implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0
# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr
# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0
@@ -91,7 +91,7 @@ body: |
# CHECK-NEXT: bb.0.entry:
# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr
#
-# CHECK: frame-setup PACIASP implicit-def $lr, implicit {{.*}}$lr, implicit $sp
+# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0
# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr
# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0
@@ -117,7 +117,7 @@ body: |
#
# CHECK: HINT 34
# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0
-# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr
+# CHECK-NEXT: $w0 = MADDWrrr $w8, $w2, $wzr
# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0
...
@@ -141,7 +141,7 @@ body: |
#
# CHECK: BRK 1
# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0
-# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr
+# CHECK-NEXT: $w0 = MADDWrrr $w8, $w2, $wzr
# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0
...
@@ -165,7 +165,7 @@ body: |
#
# CHECK: HLT 1
# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0
-# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr
+# CHECK-NEXT: $w0 = MADDWrrr $w8, $w2, $wzr
# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0
...
@@ -191,7 +191,7 @@ body: |
# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr
#
# CHECK: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0
-# CHECK-DAG: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr
+# CHECK-DAG: $w0 = MADDWrrr $w8, $w2, $wzr
# CHECK-DAG: HINT 0
# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0
diff --git a/llvm/test/CodeGen/AMDGPU/add.ll b/llvm/test/CodeGen/AMDGPU/add.ll
index 39f9cf7cf8fffc..422e2747094ce2 100644
--- a/llvm/test/CodeGen/AMDGPU/add.ll
+++ b/llvm/test/CodeGen/AMDGPU/add.ll
@@ -1263,7 +1263,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX10-NEXT: ; %bb.1: ; %else
; GFX10-NEXT: s_add_u32 s4, s4, s6
; GFX10-NEXT: s_addc_u32 s5, s5, s7
-; GFX10-NEXT: s_mov_b32 s6, 0
; GFX10-NEXT: s_cbranch_execnz .LBB9_3
; GFX10-NEXT: .LBB9_2: ; %if
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
@@ -1275,7 +1274,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
; GFX10-NEXT: s_endpgm
; GFX10-NEXT: .LBB9_4:
-; GFX10-NEXT: s_mov_b32 s6, -1
; GFX10-NEXT: ; implicit-def: $sgpr4_sgpr5
; GFX10-NEXT: s_branch .LBB9_2
;
@@ -1288,7 +1286,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX11-NEXT: ; %bb.1: ; %else
; GFX11-NEXT: s_add_u32 s4, s4, s6
; GFX11-NEXT: s_addc_u32 s5, s5, s7
-; GFX11-NEXT: s_mov_b32 s6, 0
; GFX11-NEXT: s_cbranch_execnz .LBB9_3
; GFX11-NEXT: .LBB9_2: ; %if
; GFX11-NEXT: s_load_b64 s[4:5], s[2:3], 0x0
@@ -1301,7 +1298,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
; GFX11-NEXT: s_endpgm
; GFX11-NEXT: .LBB9_4:
-; GFX11-NEXT: s_mov_b32 s6, -1
; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr5
; GFX11-NEXT: s_branch .LBB9_2
;
@@ -1313,7 +1309,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX12-NEXT: s_cbranch_scc0 .LBB9_4
; GFX12-NEXT: ; %bb.1: ; %else
; GFX12-NEXT: s_add_nc_u64 s[4:5], s[4:5], s[6:7]
-; GFX12-NEXT: s_mov_b32 s6, 0
; GFX12-NEXT: s_cbranch_execnz .LBB9_3
; GFX12-NEXT: .LBB9_2: ; %if
; GFX12-NEXT: s_load_b64 s[4:5], s[2:3], 0x0
@@ -1326,7 +1321,6 @@ define amdgpu_kernel void @add64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX12-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
; GFX12-NEXT: s_endpgm
; GFX12-NEXT: .LBB9_4:
-; GFX12-NEXT: s_mov_b32 s6, -1
; GFX12-NEXT: ; implicit-def: $sgpr4_sgpr5
; GFX12-NEXT: s_branch .LBB9_2
entry:
diff --git a/llvm/test/CodeGen/AMDGPU/bundle-latency.mir b/llvm/test/CodeGen/AMDGPU/bundle-latency.mir
index d2846fd161030e..1d694b34b1ca15 100644
--- a/llvm/test/CodeGen/AMDGPU/bundle-latency.mir
+++ b/llvm/test/CodeGen/AMDGPU/bundle-latency.mir
@@ -14,7 +14,7 @@ body: |
; GCN-NEXT: $vgpr1 = GLOBAL_LOAD_DWORD undef $vgpr3_vgpr4, 4, 0, implicit $exec
; GCN-NEXT: }
; GCN-NEXT: $vgpr6 = V_ADD_F32_e32 killed $vgpr0, $vgpr0, implicit $mode, implicit $exec
- ; GCN-NEXT: $vgpr5 = V_ADD_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; GCN-NEXT: $vgpr5 = V_ADD_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
$vgpr0, $vgpr1 = BUNDLE undef $vgpr3_vgpr4, implicit $exec {
$vgpr0 = GLOBAL_LOAD_DWORD undef $vgpr3_vgpr4, 0, 0, implicit $exec
$vgpr1 = GLOBAL_LOAD_DWORD undef $vgpr3_vgpr4, 4, 0, implicit $exec
@@ -30,10 +30,10 @@ body: |
bb.0:
; GCN-LABEL: name: dst_bundle_latency
; GCN: $vgpr1 = V_ADD_F32_e32 undef $vgpr6, undef $vgpr6, implicit $mode, implicit $exec
- ; GCN-NEXT: $vgpr0 = V_ADD_F32_e32 undef $vgpr5, undef $vgpr5, implicit $mode, implicit $exec
- ; GCN-NEXT: BUNDLE killed $vgpr0, killed $vgpr1, undef $vgpr3_vgpr4, implicit $exec {
+ ; GCN-NEXT: $vgpr0 = V_ADD_F32_e32 undef $vgpr5, undef $vgpr5, implicit killed $mode, implicit $exec
+ ; GCN-NEXT: BUNDLE killed $vgpr0, killed $vgpr1, undef $vgpr3_vgpr4, implicit killed $exec {
; GCN-NEXT: GLOBAL_STORE_DWORD undef $vgpr3_vgpr4, killed $vgpr1, 0, 0, implicit $exec
- ; GCN-NEXT: GLOBAL_STORE_DWORD undef $vgpr3_vgpr4, killed $vgpr0, 4, 0, implicit $exec
+ ; GCN-NEXT: GLOBAL_STORE_DWORD undef $vgpr3_vgpr4, killed $vgpr0, 4, 0, implicit killed $exec
; GCN-NEXT: }
$vgpr0 = V_ADD_F32_e32 undef $vgpr5, undef $vgpr5, implicit $mode, implicit $exec
$vgpr1 = V_ADD_F32_e32 undef $vgpr6, undef $vgpr6, implicit $mode, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/ctpop16.ll b/llvm/test/CodeGen/AMDGPU/ctpop16.ll
index 502e6f390433cf..b6359f18169799 100644
--- a/llvm/test/CodeGen/AMDGPU/ctpop16.ll
+++ b/llvm/test/CodeGen/AMDGPU/ctpop16.ll
@@ -1499,7 +1499,6 @@ define amdgpu_kernel void @ctpop_i16_in_br(ptr addrspace(1) %out, ptr addrspace(
; SI-NEXT: s_mov_b32 s8, s2
; SI-NEXT: s_mov_b32 s9, s3
; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 offset:2
-; SI-NEXT: s_mov_b64 s[2:3], 0
; SI-NEXT: s_cbranch_execnz .LBB14_3
; SI-NEXT: .LBB14_2: ; %if
; SI-NEXT: s_and_b32 s2, s4, 0xffff
@@ -1513,7 +1512,6 @@ define amdgpu_kernel void @ctpop_i16_in_br(ptr addrspace(1) %out, ptr addrspace(
; SI-NEXT: buffer_store_short v0, off, s[0:3], 0
; SI-NEXT: s_endpgm
; SI-NEXT: .LBB14_4:
-; SI-NEXT: s_mov_b64 s[2:3], -1
; SI-NEXT: v_mov_b32_e32 v0, 0
; SI-NEXT: s_branch .LBB14_2
;
@@ -1531,7 +1529,6 @@ define amdgpu_kernel void @ctpop_i16_in_br(ptr addrspace(1) %out, ptr addrspace(
; VI-NEXT: s_mov_b32 s8, s2
; VI-NEXT: s_mov_b32 s9, s3
; VI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 offset:2
-; VI-NEXT: s_mov_b64 s[2:3], 0
; VI-NEXT: s_cbranch_execnz .LBB14_3
; VI-NEXT: .LBB14_2: ; %if
; VI-NEXT: s_and_b32 s2, s4, 0xffff
@@ -1545,7 +1542,6 @@ define amdgpu_kernel void @ctpop_i16_in_br(ptr addrspace(1) %out, ptr addrspace(
; VI-NEXT: buffer_store_short v0, off, s[0:3], 0
; VI-NEXT: s_endpgm
; VI-NEXT: .LBB14_4:
-; VI-NEXT: s_mov_b64 s[2:3], -1
; VI-NEXT: ; implicit-def: $vgpr0
; VI-NEXT: s_branch .LBB14_2
;
diff --git a/llvm/test/CodeGen/AMDGPU/ctpop64.ll b/llvm/test/CodeGen/AMDGPU/ctpop64.ll
index 3b9c3e3ba17523..131ce14a7847c8 100644
--- a/llvm/test/CodeGen/AMDGPU/ctpop64.ll
+++ b/llvm/test/CodeGen/AMDGPU/ctpop64.ll
@@ -358,7 +358,6 @@ define amdgpu_kernel void @ctpop_i64_in_br(ptr addrspace(1) %out, ptr addrspace(
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NEXT: s_endpgm
; SI-NEXT: .LBB7_4:
-; SI-NEXT: s_mov_b64 s[6:7], -1
; SI-NEXT: ; implicit-def: $sgpr0_sgpr1
; SI-NEXT: s_branch .LBB7_2
;
@@ -372,7 +371,6 @@ define amdgpu_kernel void @ctpop_i64_in_br(ptr addrspace(1) %out, ptr addrspace(
; VI-NEXT: s_cbranch_scc0 .LBB7_4
; VI-NEXT: ; %bb.1: ; %else
; VI-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x8
-; VI-NEXT: s_mov_b64 s[6:7], 0
; VI-NEXT: s_cbranch_execnz .LBB7_3
; VI-NEXT: .LBB7_2: ; %if
; VI-NEXT: s_waitcnt lgkmcnt(0)
@@ -387,7 +385,6 @@ define amdgpu_kernel void @ctpop_i64_in_br(ptr addrspace(1) %out, ptr addrspace(
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
; VI-NEXT: .LBB7_4:
-; VI-NEXT: s_mov_b64 s[6:7], -1
; VI-NEXT: ; implicit-def: $sgpr0_sgpr1
; VI-NEXT: s_branch .LBB7_2
entry:
diff --git a/llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir b/llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
index ba619a659f1b07..dd1210426beaae 100644
--- a/llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
@@ -14,13 +14,13 @@ body: |
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_exec_lo
; CHECK: renamable $vgpr0 = IMPLICIT_DEF
; CHECK-NEXT: S_NOP 0, implicit-def $exec_lo
- ; CHECK-NEXT: $sgpr0 = S_MOV_B32 $exec_lo
+ ; CHECK-NEXT: $sgpr0 = S_MOV_B32 killed $exec_lo
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, killed $vgpr0
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
; CHECK-NEXT: S_NOP 0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0, implicit killed renamable $sgpr0
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
- ; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
S_NOP 0, implicit-def $exec_lo
%0:sreg_32 = COPY $exec_lo
S_NOP 0, implicit-def %1:sreg_32, implicit-def %2:sreg_32, implicit %0
@@ -39,13 +39,13 @@ body: |
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_exec_hi
; CHECK: renamable $vgpr0 = IMPLICIT_DEF
; CHECK-NEXT: S_NOP 0, implicit-def $exec_hi
- ; CHECK-NEXT: $sgpr0 = S_MOV_B32 $exec_hi
+ ; CHECK-NEXT: $sgpr0 = S_MOV_B32 killed $exec_hi
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, killed $vgpr0
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
; CHECK-NEXT: S_NOP 0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0, implicit killed renamable $sgpr0
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
; CHECK-NEXT: $exec_hi = S_MOV_B32 killed $sgpr0
- ; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
S_NOP 0, implicit-def $exec_hi
%0:sreg_32 = COPY $exec_hi
S_NOP 0, implicit-def %1:sreg_32, implicit-def %2:sreg_32, implicit %0
@@ -64,7 +64,7 @@ body: |
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_exec
; CHECK: renamable $vgpr0 = IMPLICIT_DEF
; CHECK-NEXT: S_NOP 0, implicit-def $exec
- ; CHECK-NEXT: $sgpr0_sgpr1 = S_MOV_B64 $exec
+ ; CHECK-NEXT: $sgpr0_sgpr1 = S_MOV_B64 killed $exec
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, killed $vgpr0, implicit-def $sgpr0_sgpr1, implicit $sgpr0_sgpr1
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr1, 1, killed $vgpr0, implicit $sgpr0_sgpr1
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr0_sgpr1
@@ -73,7 +73,7 @@ body: |
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr0_sgpr1
; CHECK-NEXT: $sgpr1 = V_READLANE_B32 killed $vgpr0, 1
; CHECK-NEXT: $exec = S_MOV_B64 killed $sgpr0_sgpr1
- ; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
S_NOP 0, implicit-def $exec
%0:sreg_64 = COPY $exec
S_NOP 0, implicit-def %1:sreg_64, implicit-def %2:sreg_64, implicit %0
@@ -100,7 +100,7 @@ body: |
; CHECK-NEXT: S_NOP 0, implicit killed renamable $sgpr0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
- ; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
S_NOP 0, implicit-def %0:sreg_32, implicit-def %1:sreg_32, implicit-def $exec_lo
S_NOP 0, implicit %0, implicit-def %3:sreg_32, implicit-def %4:sreg_32
$exec_lo = COPY %0
@@ -123,7 +123,7 @@ body: |
; CHECK-NEXT: S_NOP 0, implicit killed renamable $sgpr0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
; CHECK-NEXT: $exec_hi = S_MOV_B32 killed $sgpr0
- ; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
S_NOP 0, implicit-def %0:sreg_32, implicit-def %1:sreg_32, implicit-def $exec_hi
S_NOP 0, implicit %0, implicit-def %3:sreg_32, implicit-def %4:sreg_32
$exec_hi = COPY %0
@@ -149,7 +149,7 @@ body: |
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr0_sgpr1
; CHECK-NEXT: $sgpr1 = V_READLANE_B32 killed $vgpr0, 1
; CHECK-NEXT: $exec = S_MOV_B64 killed $sgpr0_sgpr1
- ; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
S_NOP 0, implicit-def %0:sreg_64, implicit-def %1:sreg_64, implicit-def $exec
S_NOP 0, implicit %0, implicit-def %3:sreg_64, implicit-def %4:sreg_64
$exec = COPY %0
diff --git a/llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir b/llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir
index 1c7896fcb4f141..91041493c7e9e4 100644
--- a/llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir
@@ -15,14 +15,14 @@ body: |
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_m0
; CHECK: renamable $vgpr0 = IMPLICIT_DEF
; CHECK-NEXT: S_NOP 0, implicit-def $m0
- ; CHECK-NEXT: $sgpr0 = S_MOV_B32 $m0
+ ; CHECK-NEXT: $sgpr0 = S_MOV_B32 killed $m0
; CHECK-NEXT: renamable $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, killed $vgpr0
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr0, 0
; CHECK-NEXT: S_NOP 0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0, implicit killed renamable $sgpr0
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
; CHECK-NEXT: $m0 = S_MOV_B32 killed $sgpr0
; CHECK-NEXT: S_NOP 0
- ; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
S_NOP 0, implicit-def $m0
%0:sreg_32 = COPY $m0
S_NOP 0, implicit-def %1:sreg_32, implicit-def %2:sreg_32, implicit %0
@@ -51,7 +51,7 @@ body: |
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 killed $vgpr0, 0
; CHECK-NEXT: $m0 = S_MOV_B32 killed $sgpr0
; CHECK-NEXT: S_NOP 0
- ; CHECK-NEXT: S_SENDMSG 0, implicit $m0, implicit $exec
+ ; CHECK-NEXT: S_SENDMSG 0, implicit killed $m0, implicit killed $exec
S_NOP 0, implicit-def %0:sreg_32, implicit-def %1:sreg_32, implicit-def $m0
S_NOP 0, implicit %0, implicit-def %3:sreg_32, implicit-def %4:sreg_32
$m0 = COPY %0
diff --git a/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll b/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
index 9e336a714ca67f..fc7d250985b54e 100644
--- a/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
+++ b/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
@@ -10,12 +10,12 @@ define fastcc i32 @foo() {
; CHECK-NEXT: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $vgpr31, $vgpr40, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_WAITCNT 0
- ; CHECK-NEXT: $sgpr16 = S_MOV_B32 $sgpr33
+ ; CHECK-NEXT: $sgpr16 = S_MOV_B32 killed $sgpr33
; CHECK-NEXT: $sgpr33 = S_MOV_B32 $sgpr32
- ; CHECK-NEXT: $sgpr17 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
- ; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
+ ; CHECK-NEXT: $sgpr17 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit killed $exec
+ ; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit killed $exec :: (store (s32) into %stack.2, addrspace 5)
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr17
- ; CHECK-NEXT: $sgpr32 = frame-setup S_ADDK_I32 $sgpr32, 512, implicit-def dead $scc
+ ; CHECK-NEXT: $sgpr32 = frame-setup S_ADDK_I32 killed $sgpr32, 512, implicit-def dead $scc
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr16, 2, undef $vgpr40
; CHECK-NEXT: BUNDLE implicit-def $sgpr16_sgpr17, implicit-def $sgpr16, implicit-def $sgpr16_lo16, implicit-def $sgpr16_hi16, implicit-def $sgpr17, implicit-def $sgpr17_lo16, implicit-def $sgpr17_hi16, implicit-def $scc {
; CHECK-NEXT: $sgpr16_sgpr17 = S_GETPC_B64
@@ -29,8 +29,8 @@ define fastcc i32 @foo() {
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr30, 0, killed $vgpr40
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr31, 1, killed $vgpr40
; CHECK-NEXT: S_WAITCNT 49279
- ; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, @bar, csr_amdgpu, implicit killed $sgpr4_sgpr5, implicit killed $sgpr6_sgpr7, implicit killed $sgpr8_sgpr9, implicit killed $sgpr10_sgpr11, implicit killed $sgpr12, implicit killed $sgpr13, implicit killed $sgpr14, implicit killed $sgpr15, implicit killed $vgpr31, implicit $sgpr0_sgpr1_sgpr2_sgpr3
- ; CHECK-NEXT: $vcc_lo = S_MOV_B32 $exec_lo
+ ; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, @bar, csr_amdgpu, implicit killed $sgpr4_sgpr5, implicit killed $sgpr6_sgpr7, implicit killed $sgpr8_sgpr9, implicit killed $sgpr10_sgpr11, implicit killed $sgpr12, implicit killed $sgpr13, implicit killed $sgpr14, implicit killed $sgpr15, implicit killed $vgpr31, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3
+ ; CHECK-NEXT: $vcc_lo = S_MOV_B32 killed $exec_lo
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1 (%ir-block.1):
; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.1(0x7c000000)
@@ -44,10 +44,10 @@ define fastcc i32 @foo() {
; CHECK-NEXT: $sgpr31 = V_READLANE_B32 $vgpr40, 1
; CHECK-NEXT: $sgpr30 = V_READLANE_B32 $vgpr40, 0
; CHECK-NEXT: $sgpr4 = V_READLANE_B32 killed $vgpr40, 2
- ; CHECK-NEXT: $sgpr5 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
- ; CHECK-NEXT: $vgpr40 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (load (s32) from %stack.2, addrspace 5)
+ ; CHECK-NEXT: $sgpr5 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit killed $exec
+ ; CHECK-NEXT: $vgpr40 = BUFFER_LOAD_DWORD_OFFSET killed $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr33, 0, 0, 0, implicit killed $exec :: (load (s32) from %stack.2, addrspace 5)
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr5
- ; CHECK-NEXT: $sgpr32 = frame-destroy S_ADDK_I32 $sgpr32, -512, implicit-def dead $scc
+ ; CHECK-NEXT: $sgpr32 = frame-destroy S_ADDK_I32 killed $sgpr32, -512, implicit-def dead $scc
; CHECK-NEXT: $sgpr33 = S_MOV_B32 killed $sgpr4
; CHECK-NEXT: S_WAITCNT 16240
; CHECK-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31, implicit undef $vgpr0
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
index f30c890934c92b..8302af7450ed9d 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
@@ -100,7 +100,6 @@ define amdgpu_kernel void @set_inactive_scc(ptr addrspace(1) %out, i32 %in, <4 x
; GCN-NEXT: s_mov_b32 s3, 0xf000
; GCN-NEXT: s_mov_b32 s2, -1
; GCN-NEXT: buffer_store_dword v1, off, s[0:3], 0
-; GCN-NEXT: s_mov_b64 s[2:3], 0
; GCN-NEXT: s_cbranch_execnz .LBB4_2
; GCN-NEXT: .LBB4_4: ; %.zero
; GCN-NEXT: s_mov_b32 s3, 0xf000
diff --git a/llvm/test/CodeGen/AMDGPU/misched-killflags.mir b/llvm/test/CodeGen/AMDGPU/misched-killflags.mir
index 9d0c32214100f9..ae5a0dddd1b3fb 100644
--- a/llvm/test/CodeGen/AMDGPU/misched-killflags.mir
+++ b/llvm/test/CodeGen/AMDGPU/misched-killflags.mir
@@ -32,7 +32,7 @@ body: |
# CHECK-DAG: $sgpr10 = S_MOV_B32 5
# CHECK-DAG: $sgpr9 = S_MOV_B32 4
# CHECK-DAG: $sgpr8 = S_MOV_B32 3
-# CHECK-DAG: $sgpr33 = S_MOV_B32 $sgpr7
+# CHECK-DAG: $sgpr33 = S_MOV_B32 killed $sgpr7
# CHECK: $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $sgpr8_sgpr9_sgpr10_sgpr11
# CHECK: BUNDLE implicit-def $sgpr6_sgpr7, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $scc {
# CHECK: $sgpr6_sgpr7 = S_GETPC_B64
@@ -43,6 +43,6 @@ body: |
# CHECK: $sgpr4 = S_MOV_B32 killed $sgpr33
# CHECK: $vgpr1 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11
# CHECK: $vgpr2 = V_MOV_B32_e32 $sgpr10, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11
-# CHECK: $vgpr3 = V_MOV_B32_e32 killed $sgpr11, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11, implicit $exec
-# CHECK: S_NOP 0, implicit $sgpr6_sgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $sgpr4, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3
+# CHECK: $vgpr3 = V_MOV_B32_e32 killed $sgpr11, implicit killed $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11, implicit $exec
+# CHECK: S_NOP 0, implicit killed $sgpr6_sgpr7, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $sgpr4, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3
# CHECK: S_ENDPGM 0
diff --git a/llvm/test/CodeGen/AMDGPU/mul.ll b/llvm/test/CodeGen/AMDGPU/mul.ll
index 0d2558c4f0124f..b4272049f36a4c 100644
--- a/llvm/test/CodeGen/AMDGPU/mul.ll
+++ b/llvm/test/CodeGen/AMDGPU/mul.ll
@@ -2517,7 +2517,6 @@ define amdgpu_kernel void @mul64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX10-NEXT: s_add_i32 s7, s8, s7
; GFX10-NEXT: s_mul_i32 s4, s4, s6
; GFX10-NEXT: s_add_i32 s5, s7, s5
-; GFX10-NEXT: s_mov_b32 s6, 0
; GFX10-NEXT: s_cbranch_execnz .LBB16_4
; GFX10-NEXT: .LBB16_2: ; %if
; GFX10-NEXT: s_mov_b32 s7, 0x31016000
@@ -2527,7 +2526,6 @@ define amdgpu_kernel void @mul64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX10-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0
; GFX10-NEXT: s_branch .LBB16_5
; GFX10-NEXT: .LBB16_3:
-; GFX10-NEXT: s_mov_b32 s6, -1
; GFX10-NEXT: ; implicit-def: $sgpr4_sgpr5
; GFX10-NEXT: s_branch .LBB16_2
; GFX10-NEXT: .LBB16_4:
@@ -2553,7 +2551,6 @@ define amdgpu_kernel void @mul64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX11-NEXT: s_add_i32 s7, s8, s7
; GFX11-NEXT: s_mul_i32 s4, s4, s6
; GFX11-NEXT: s_add_i32 s5, s7, s5
-; GFX11-NEXT: s_mov_b32 s6, 0
; GFX11-NEXT: s_cbranch_execnz .LBB16_4
; GFX11-NEXT: .LBB16_2: ; %if
; GFX11-NEXT: s_mov_b32 s7, 0x31016000
@@ -2563,7 +2560,6 @@ define amdgpu_kernel void @mul64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX11-NEXT: buffer_load_b64 v[0:1], off, s[4:7], 0
; GFX11-NEXT: s_branch .LBB16_5
; GFX11-NEXT: .LBB16_3:
-; GFX11-NEXT: s_mov_b32 s6, -1
; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr5
; GFX11-NEXT: s_branch .LBB16_2
; GFX11-NEXT: .LBB16_4:
@@ -2585,7 +2581,6 @@ define amdgpu_kernel void @mul64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX12-NEXT: s_cbranch_scc0 .LBB16_3
; GFX12-NEXT: ; %bb.1: ; %else
; GFX12-NEXT: s_mul_u64 s[4:5], s[4:5], s[6:7]
-; GFX12-NEXT: s_mov_b32 s6, 0
; GFX12-NEXT: s_cbranch_execnz .LBB16_4
; GFX12-NEXT: .LBB16_2: ; %if
; GFX12-NEXT: s_mov_b32 s7, 0x31016000
@@ -2595,7 +2590,6 @@ define amdgpu_kernel void @mul64_in_branch(ptr addrspace(1) %out, ptr addrspace(
; GFX12-NEXT: buffer_load_b64 v[0:1], off, s[4:7], null
; GFX12-NEXT: s_branch .LBB16_5
; GFX12-NEXT: .LBB16_3:
-; GFX12-NEXT: s_mov_b32 s6, -1
; GFX12-NEXT: ; implicit-def: $sgpr4_sgpr5
; GFX12-NEXT: s_branch .LBB16_2
; GFX12-NEXT: .LBB16_4:
diff --git a/llvm/test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir b/llvm/test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir
index d707291d0df204..3f2b9616810c93 100644
--- a/llvm/test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir
+++ b/llvm/test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir
@@ -24,8 +24,8 @@ body: |
; CHECK-NEXT: DS_GWS_INIT $vgpr0, 8, implicit $m0, implicit $exec
; CHECK-NEXT: S_WAITCNT 0
; CHECK-NEXT: }
- ; CHECK-NEXT: BUNDLE implicit killed $vgpr0, implicit $m0, implicit $exec {
- ; CHECK-NEXT: DS_GWS_BARRIER killed $vgpr0, 8, implicit $m0, implicit $exec
+ ; CHECK-NEXT: BUNDLE implicit killed $vgpr0, implicit killed $m0, implicit killed $exec {
+ ; CHECK-NEXT: DS_GWS_BARRIER killed $vgpr0, 8, implicit killed $m0, implicit killed $exec
; CHECK-NEXT: S_WAITCNT 0
; CHECK-NEXT: }
renamable $sgpr0 = S_LOAD_DWORD_IMM killed renamable $sgpr4_sgpr5, 0, 0
diff --git a/llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir b/llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
index 2c1880c88631ec..8f958a9e5bf369 100644
--- a/llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
+++ b/llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
@@ -15,7 +15,7 @@ body: |
; CHECK-NEXT: $sgpr4 = S_LSHL_B32 killed $sgpr22, 1, implicit-def dead $scc
; CHECK-NEXT: $sgpr22_sgpr23 = S_LOAD_DWORDX2_IMM killed $sgpr2_sgpr3, 36, 0 :: (dereferenceable invariant load (s64), addrspace 4)
; CHECK-NEXT: $vgpr2 = nsw V_MUL_LO_U32_e64 killed $vgpr1, killed $sgpr1, implicit $exec
- ; CHECK-NEXT: early-clobber $vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21 = V_MFMA_F32_32X32X8F16_vgprcd_e64 killed $vgpr2_vgpr3, $vgpr72_vgpr73, 0, 0, 0, 0, implicit $mode, implicit $exec
+ ; CHECK-NEXT: early-clobber $vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21 = V_MFMA_F32_32X32X8F16_vgprcd_e64 killed $vgpr2_vgpr3, killed $vgpr72_vgpr73, 0, 0, 0, 0, implicit killed $mode, implicit killed $exec
$sgpr1 = S_LOAD_DWORD_IMM $sgpr2_sgpr3, 56, 0 :: (dereferenceable invariant load (s64), addrspace 4)
$vgpr2 = nsw V_MUL_LO_U32_e64 $vgpr1, $sgpr1, implicit $exec
$vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21 = V_MFMA_F32_32X32X8F16_vgprcd_e64 $vgpr2_vgpr3, $vgpr72_vgpr73, 0, 0, 0, 0, implicit $mode, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/sched-barrier-post-RA.mir b/llvm/test/CodeGen/AMDGPU/sched-barrier-post-RA.mir
index 7bdb8f5b35ec5e..6fa3ab2269db42 100644
--- a/llvm/test/CodeGen/AMDGPU/sched-barrier-post-RA.mir
+++ b/llvm/test/CodeGen/AMDGPU/sched-barrier-post-RA.mir
@@ -24,9 +24,9 @@ body: |
; CHECK-NEXT: }
; CHECK-NEXT: renamable $vgpr1 = nsw V_MUL_LO_U32_e64 killed $vgpr1, $vgpr1, implicit $exec
; CHECK-NEXT: renamable $vgpr2 = nsw V_MUL_LO_U32_e64 killed $vgpr2, $vgpr2, implicit $exec
- ; CHECK-NEXT: BUNDLE implicit killed $vgpr0, implicit killed $vgpr1, implicit killed $sgpr0_sgpr1, implicit $exec, implicit killed $vgpr2 {
+ ; CHECK-NEXT: BUNDLE implicit killed $vgpr0, implicit killed $vgpr1, implicit killed $sgpr0_sgpr1, implicit killed $exec, implicit killed $vgpr2 {
; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, killed renamable $vgpr1, renamable $sgpr0_sgpr1, 0, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
- ; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR killed renamable $vgpr0, killed renamable $vgpr2, killed renamable $sgpr0_sgpr1, 512, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
+ ; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR killed renamable $vgpr0, killed renamable $vgpr2, killed renamable $sgpr0_sgpr1, 512, 0, implicit killed $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
; CHECK-NEXT: }
; CHECK-NEXT: S_ENDPGM 0
renamable $sgpr0_sgpr1 = IMPLICIT_DEF
@@ -61,9 +61,9 @@ body: |
; CHECK-NEXT: renamable $vgpr1 = nsw V_MUL_LO_U32_e64 killed $vgpr1, $vgpr1, implicit $exec
; CHECK-NEXT: SCHED_BARRIER 0
; CHECK-NEXT: renamable $vgpr2 = nsw V_MUL_LO_U32_e64 killed $vgpr2, $vgpr2, implicit $exec
- ; CHECK-NEXT: BUNDLE implicit killed $vgpr0, implicit killed $vgpr1, implicit killed $sgpr0_sgpr1, implicit $exec, implicit killed $vgpr2 {
+ ; CHECK-NEXT: BUNDLE implicit killed $vgpr0, implicit killed $vgpr1, implicit killed $sgpr0_sgpr1, implicit killed $exec, implicit killed $vgpr2 {
; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, killed renamable $vgpr1, renamable $sgpr0_sgpr1, 0, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
- ; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR killed renamable $vgpr0, killed renamable $vgpr2, killed renamable $sgpr0_sgpr1, 512, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
+ ; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR killed renamable $vgpr0, killed renamable $vgpr2, killed renamable $sgpr0_sgpr1, 512, 0, implicit killed $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
; CHECK-NEXT: }
; CHECK-NEXT: S_ENDPGM 0
renamable $sgpr0_sgpr1 = IMPLICIT_DEF
@@ -100,9 +100,9 @@ body: |
; CHECK-NEXT: SCHED_BARRIER 1
; CHECK-NEXT: renamable $vgpr1 = nsw V_MUL_LO_U32_e64 killed $vgpr1, $vgpr1, implicit $exec
; CHECK-NEXT: renamable $vgpr2 = nsw V_MUL_LO_U32_e64 killed $vgpr2, $vgpr2, implicit $exec
- ; CHECK-NEXT: BUNDLE implicit killed $vgpr0, implicit killed $vgpr1, implicit killed $sgpr0_sgpr1, implicit $exec, implicit killed $vgpr2 {
+ ; CHECK-NEXT: BUNDLE implicit killed $vgpr0, implicit killed $vgpr1, implicit killed $sgpr0_sgpr1, implicit killed $exec, implicit killed $vgpr2 {
; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, killed renamable $vgpr1, renamable $sgpr0_sgpr1, 0, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
- ; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR killed renamable $vgpr0, killed renamable $vgpr2, killed renamable $sgpr0_sgpr1, 512, 0, implicit $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
+ ; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR killed renamable $vgpr0, killed renamable $vgpr2, killed renamable $sgpr0_sgpr1, 512, 0, implicit killed $exec :: (store (s32) into %ir.out, !noalias !0, addrspace 1)
; CHECK-NEXT: }
; CHECK-NEXT: S_ENDPGM 0
renamable $sgpr0_sgpr1 = IMPLICIT_DEF
diff --git a/llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir b/llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
index 8f53ec2f992dac..fa533e30f9d536 100644
--- a/llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
+++ b/llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
@@ -316,9 +316,9 @@ body: |
; VR-NEXT: renamable $sgpr20 = S_MOV_B32 -1
; VR-NEXT: renamable $sgpr25 = S_MOV_B32 -1
; VR-NEXT: renamable $sgpr26 = S_MOV_B32 -1
- ; VR-NEXT: SI_SPILL_S512_SAVE killed renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s512) into %stack.0, align 4, addrspace 5)
+ ; VR-NEXT: SI_SPILL_S512_SAVE killed renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27, %stack.0, implicit $exec, implicit killed $sgpr32 :: (store (s512) into %stack.0, align 4, addrspace 5)
; VR-NEXT: S_NOP 0, implicit-def $sgpr8, implicit-def $sgpr12, implicit-def $sgpr16, implicit-def $sgpr20, implicit-def $sgpr24, implicit-def $sgpr28, implicit-def $sgpr32, implicit-def $sgpr36, implicit-def $sgpr40, implicit-def $sgpr44, implicit-def $sgpr48, implicit-def $sgpr52, implicit-def $sgpr56, implicit-def $sgpr60, implicit-def $sgpr64, implicit-def $sgpr68, implicit-def $sgpr72, implicit-def $sgpr74, implicit-def $sgpr78, implicit-def $sgpr82, implicit-def $sgpr86, implicit-def $sgpr90, implicit-def $sgpr94, implicit-def $sgpr98
- ; VR-NEXT: renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27 = SI_SPILL_S512_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s512) from %stack.0, align 4, addrspace 5)
+ ; VR-NEXT: renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27 = SI_SPILL_S512_RESTORE %stack.0, implicit killed $exec, implicit killed $sgpr32 :: (load (s512) from %stack.0, align 4, addrspace 5)
; VR-NEXT: renamable $sgpr12_sgpr13 = COPY killed renamable $sgpr16_sgpr17
; VR-NEXT: renamable $sgpr15 = COPY killed renamable $sgpr19
; VR-NEXT: renamable $sgpr18_sgpr19 = COPY killed renamable $sgpr22_sgpr23
diff --git a/llvm/test/CodeGen/AMDGPU/syncscopes.ll b/llvm/test/CodeGen/AMDGPU/syncscopes.ll
index 1b7a8122910e37..04617c388d5270 100644
--- a/llvm/test/CodeGen/AMDGPU/syncscopes.ll
+++ b/llvm/test/CodeGen/AMDGPU/syncscopes.ll
@@ -3,7 +3,7 @@
; GCN-LABEL: name: syncscopes
; GCN: FLAT_STORE_DWORD killed renamable $vgpr1_vgpr2, killed renamable $vgpr0, 0, 0, implicit $exec, implicit $flat_scr :: (store syncscope("agent") seq_cst (s32) into %ir.agent_out)
; GCN: FLAT_STORE_DWORD killed renamable $vgpr4_vgpr5, killed renamable $vgpr3, 0, 0, implicit $exec, implicit $flat_scr :: (store syncscope("workgroup") seq_cst (s32) into %ir.workgroup_out)
-; GCN: FLAT_STORE_DWORD killed renamable $vgpr7_vgpr8, killed renamable $vgpr6, 0, 0, implicit $exec, implicit $flat_scr :: (store syncscope("wavefront") seq_cst (s32) into %ir.wavefront_out)
+; GCN: FLAT_STORE_DWORD killed renamable $vgpr7_vgpr8, killed renamable $vgpr6, 0, 0, implicit killed $exec, implicit killed $flat_scr :: (store syncscope("wavefront") seq_cst (s32) into %ir.wavefront_out)
define void @syncscopes(
i32 %agent,
ptr %agent_out,
diff --git a/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll b/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
index eef5f57beb07d7..f503e9e3f57a75 100644
--- a/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
+++ b/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
@@ -31,7 +31,7 @@ define amdgpu_ps float @test_return_to_epilog_into_end_block(i32 inreg %a, float
; GCN-NEXT: successors:
; GCN-NEXT: {{ $}}
; GCN-NEXT: renamable $vgpr0 = V_MOV_B32_e32 0, implicit $exec
- ; GCN-NEXT: GLOBAL_STORE_DWORD undef renamable $vgpr0_vgpr1, killed renamable $vgpr0, 0, 0, implicit $exec :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
+ ; GCN-NEXT: GLOBAL_STORE_DWORD undef renamable $vgpr0_vgpr1, killed renamable $vgpr0, 0, 0, implicit killed $exec :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
; GCN-NEXT: S_WAITCNT_soft 3952
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.3:
@@ -71,14 +71,14 @@ define amdgpu_ps float @test_unify_return_to_epilog_into_end_block(i32 inreg %a,
; GCN-NEXT: successors: %bb.5(0x80000000)
; GCN-NEXT: liveins: $vgpr1
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit $exec, implicit $exec
+ ; GCN-NEXT: $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit killed $exec, implicit $exec
; GCN-NEXT: S_BRANCH %bb.5
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.4.else:
; GCN-NEXT: successors:
; GCN-NEXT: {{ $}}
; GCN-NEXT: renamable $vgpr0 = V_MOV_B32_e32 0, implicit $exec
- ; GCN-NEXT: GLOBAL_STORE_DWORD undef renamable $vgpr0_vgpr1, killed renamable $vgpr0, 0, 0, implicit $exec :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
+ ; GCN-NEXT: GLOBAL_STORE_DWORD undef renamable $vgpr0_vgpr1, killed renamable $vgpr0, 0, 0, implicit killed $exec :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
; GCN-NEXT: S_WAITCNT_soft 3952
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.5:
@@ -105,30 +105,30 @@ define amdgpu_ps { <4 x float> } @test_return_to_epilog_with_optimized_kill(floa
; GCN-NEXT: {{ $}}
; GCN-NEXT: renamable $vgpr1 = nofpexcept V_RCP_F32_e32 $vgpr0, implicit $mode, implicit $exec
; GCN-NEXT: $sgpr0_sgpr1 = S_MOV_B64 $exec
- ; GCN-NEXT: nofpexcept V_CMP_NGT_F32_e32 0, killed $vgpr1, implicit-def $vcc, implicit $mode, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_AND_SAVEEXEC_B64 killed $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
+ ; GCN-NEXT: nofpexcept V_CMP_NGT_F32_e32 0, killed $vgpr1, implicit-def $vcc, implicit killed $mode, implicit $exec
+ ; GCN-NEXT: $sgpr2_sgpr3 = S_AND_SAVEEXEC_B64 killed $vcc, implicit-def $exec, implicit-def $scc, implicit killed $exec
; GCN-NEXT: renamable $sgpr2_sgpr3 = S_XOR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def dead $scc
- ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.3, implicit $exec
+ ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.3, implicit killed $exec
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.1.Flow1:
; GCN-NEXT: successors: %bb.6(0x40000000), %bb.2(0x40000000)
; GCN-NEXT: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: $sgpr2_sgpr3 = S_ANDN2_SAVEEXEC_B64 killed $sgpr2_sgpr3, implicit-def $exec, implicit-def $scc, implicit $exec
- ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.6, implicit $exec
+ ; GCN-NEXT: $sgpr2_sgpr3 = S_ANDN2_SAVEEXEC_B64 killed $sgpr2_sgpr3, implicit-def $exec, implicit-def $scc, implicit killed $exec
+ ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.6, implicit killed $exec
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.2.end:
; GCN-NEXT: successors: %bb.9(0x80000000)
; GCN-NEXT: liveins: $sgpr2_sgpr3
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc
+ ; GCN-NEXT: $exec = S_OR_B64 killed $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc
; GCN-NEXT: S_BRANCH %bb.9
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.3.flow.preheader:
; GCN-NEXT: successors: %bb.4(0x80000000)
; GCN-NEXT: liveins: $vgpr0, $sgpr0_sgpr1, $sgpr2_sgpr3
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: nofpexcept V_CMP_NGT_F32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $mode, implicit $exec
+ ; GCN-NEXT: nofpexcept V_CMP_NGT_F32_e32 0, killed $vgpr0, implicit-def $vcc, implicit killed $mode, implicit killed $exec
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_MOV_B64 0
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.4.flow:
@@ -137,16 +137,16 @@ define amdgpu_ps { <4 x float> } @test_return_to_epilog_with_optimized_kill(floa
; GCN-NEXT: {{ $}}
; GCN-NEXT: renamable $sgpr6_sgpr7 = S_AND_B64 $exec, renamable $vcc, implicit-def $scc
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_OR_B64 killed renamable $sgpr6_sgpr7, killed renamable $sgpr4_sgpr5, implicit-def $scc
- ; GCN-NEXT: $exec = S_ANDN2_B64 $exec, renamable $sgpr4_sgpr5, implicit-def $scc
- ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.4, implicit $exec
+ ; GCN-NEXT: $exec = S_ANDN2_B64 killed $exec, renamable $sgpr4_sgpr5, implicit-def $scc
+ ; GCN-NEXT: S_CBRANCH_EXECNZ %bb.4, implicit killed $exec
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.5.Flow:
; GCN-NEXT: successors: %bb.6(0x40000000), %bb.2(0x40000000)
; GCN-NEXT: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def $scc
- ; GCN-NEXT: $sgpr2_sgpr3 = S_ANDN2_SAVEEXEC_B64 killed $sgpr2_sgpr3, implicit-def $exec, implicit-def $scc, implicit $exec
- ; GCN-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
+ ; GCN-NEXT: $exec = S_OR_B64 killed $exec, killed renamable $sgpr4_sgpr5, implicit-def $scc
+ ; GCN-NEXT: $sgpr2_sgpr3 = S_ANDN2_SAVEEXEC_B64 killed $sgpr2_sgpr3, implicit-def $exec, implicit-def $scc, implicit killed $exec
+ ; GCN-NEXT: S_CBRANCH_EXECZ %bb.2, implicit killed $exec
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.6.kill0:
; GCN-NEXT: successors: %bb.7(0x40000000), %bb.8(0x40000000)
@@ -160,7 +160,7 @@ define amdgpu_ps { <4 x float> } @test_return_to_epilog_with_optimized_kill(floa
; GCN-NEXT: liveins: $sgpr2_sgpr3, $scc
; GCN-NEXT: {{ $}}
; GCN-NEXT: $exec = S_MOV_B64 0
- ; GCN-NEXT: $exec = S_OR_B64 $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc
+ ; GCN-NEXT: $exec = S_OR_B64 killed $exec, killed renamable $sgpr2_sgpr3, implicit-def $scc
; GCN-NEXT: S_BRANCH %bb.9
; GCN-NEXT: {{ $}}
; GCN-NEXT: bb.8:
diff --git a/llvm/test/CodeGen/AMDGPU/vopd-combine.mir b/llvm/test/CodeGen/AMDGPU/vopd-combine.mir
index 3c1da043bcd6c7..c64aa02bac592c 100644
--- a/llvm/test/CodeGen/AMDGPU/vopd-combine.mir
+++ b/llvm/test/CodeGen/AMDGPU/vopd-combine.mir
@@ -37,25 +37,24 @@ body: |
; SCHED-NEXT: $vgpr2 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
; SCHED-NEXT: $vgpr3 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
; SCHED-NEXT: $vgpr6 = V_MUL_F32_e32 killed $vgpr0, $vgpr0, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr4 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr4 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_schedule
; PAIR-GFX11: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr2 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
; PAIR-GFX11-NEXT: $vgpr3, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx11 $vgpr1, $vgpr1, killed $vgpr0, $vgpr0, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
- ; PAIR-GFX11-NEXT: $vgpr4 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr4 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_schedule
; PAIR-GFX12: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr2 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
; PAIR-GFX12-NEXT: $vgpr3, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx12 $vgpr1, $vgpr1, killed $vgpr0, $vgpr0, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
- ; PAIR-GFX12-NEXT: $vgpr4 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr4 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; can fuse vgpr3 and vgpr6 writing insts only due to reg constraints
$vgpr3 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr4 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr6 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
@@ -74,26 +73,25 @@ body: |
; SCHED-NEXT: $vgpr1 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr3 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 10, killed $vgpr3, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_fmamk
; PAIR-GFX11: $vgpr2 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr3 = IMPLICIT_DEF
- ; PAIR-GFX11-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx11 killed $vgpr0, 10, killed $vgpr3, killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx11 killed $vgpr0, 10, killed $vgpr3, killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_fmamk
; PAIR-GFX12: $vgpr2 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr3 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx12 killed $vgpr0, 10, killed $vgpr3, killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx12 killed $vgpr0, 10, killed $vgpr3, killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = IMPLICIT_DEF
$vgpr3 = IMPLICIT_DEF
- ; should pair
$vgpr2 = V_FMAC_F32_e32 $vgpr1, $vgpr1, $vgpr2, implicit $mode, implicit $exec
$vgpr5 = V_FMAMK_F32 $vgpr0, 10, $vgpr3, implicit $mode, implicit $exec
@@ -111,7 +109,7 @@ body: |
; SCHED-NEXT: $vgpr0 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr4 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 10, killed $vgpr4, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit killed $mode, implicit killed $exec
;
; PAIR-LABEL: name: vopd_fmamk_fail
; PAIR: $vgpr1 = IMPLICIT_DEF
@@ -119,12 +117,11 @@ body: |
; PAIR-NEXT: $vgpr0 = IMPLICIT_DEF
; PAIR-NEXT: $vgpr4 = IMPLICIT_DEF
; PAIR-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 10, killed $vgpr4, implicit $mode, implicit $exec
- ; PAIR-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+ ; PAIR-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = V_XOR_B32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr4 = IMPLICIT_DEF
- ; should not pair
$vgpr2 = V_FMAC_F32_e32 $vgpr1, $vgpr1, $vgpr2, implicit $mode, implicit $exec
$vgpr5 = V_FMAMK_F32 $vgpr0, 10, $vgpr4, implicit $mode, implicit $exec
@@ -146,7 +143,7 @@ body: |
; SCHED-NEXT: $vgpr5 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
; SCHED-NEXT: $vgpr7 = V_CNDMASK_B32_e32 killed $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
; SCHED-NEXT: $vgpr6 = V_ADD_F32_e32 $sgpr20, $vgpr3, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr9 = V_CNDMASK_B32_e32 killed $sgpr20, killed $vgpr3, implicit $mode, implicit $exec, implicit $vcc
+ ; SCHED-NEXT: $vgpr9 = V_CNDMASK_B32_e32 killed $sgpr20, killed $vgpr3, implicit killed $mode, implicit killed $exec, implicit killed $vcc
;
; PAIR-GFX11-LABEL: name: vopd_cndmask
; PAIR-GFX11: $vgpr2 = IMPLICIT_DEF
@@ -158,7 +155,7 @@ body: |
; PAIR-GFX11-NEXT: $vgpr2, $vgpr5 = V_DUAL_FMAC_F32_e32_X_CNDMASK_B32_e32_gfx11 $sgpr20, killed $vgpr1, killed $vgpr2, $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX11-NEXT: $vgpr7 = V_CNDMASK_B32_e32 killed $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX11-NEXT: $vgpr6 = V_ADD_F32_e32 $sgpr20, $vgpr3, implicit $mode, implicit $exec
- ; PAIR-GFX11-NEXT: $vgpr9 = V_CNDMASK_B32_e32 killed $sgpr20, killed $vgpr3, implicit $mode, implicit $exec, implicit $vcc
+ ; PAIR-GFX11-NEXT: $vgpr9 = V_CNDMASK_B32_e32 killed $sgpr20, killed $vgpr3, implicit killed $mode, implicit killed $exec, implicit killed $vcc
;
; PAIR-GFX12-LABEL: name: vopd_cndmask
; PAIR-GFX12: $vgpr2 = IMPLICIT_DEF
@@ -170,19 +167,16 @@ body: |
; PAIR-GFX12-NEXT: $vgpr2, $vgpr5 = V_DUAL_FMAC_F32_e32_X_CNDMASK_B32_e32_gfx12 $sgpr20, killed $vgpr1, killed $vgpr2, $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX12-NEXT: $vgpr7 = V_CNDMASK_B32_e32 killed $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX12-NEXT: $vgpr6 = V_ADD_F32_e32 $sgpr20, $vgpr3, implicit $mode, implicit $exec
- ; PAIR-GFX12-NEXT: $vgpr9 = V_CNDMASK_B32_e32 killed $sgpr20, killed $vgpr3, implicit $mode, implicit $exec, implicit $vcc
+ ; PAIR-GFX12-NEXT: $vgpr9 = V_CNDMASK_B32_e32 killed $sgpr20, killed $vgpr3, implicit killed $mode, implicit killed $exec, implicit killed $vcc
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = IMPLICIT_DEF
$vgpr3 = IMPLICIT_DEF
$sgpr20 = IMPLICIT_DEF
- ; should pair
$vgpr2 = V_FMAC_F32_e32 $sgpr20, $vgpr1, $vgpr2, implicit $mode, implicit $exec
$vgpr5 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
- ; should not pair, uses 3 scalars (implicit vcc)
$vgpr4 = V_FMAMK_F32 $sgpr20, 12345, $vgpr3, implicit $mode, implicit $exec
$vgpr7 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
- ; should not pair, uses 3 scalars (implicit vcc)
$vgpr6 = V_ADD_F32_e32 $sgpr20, $vgpr3, implicit $mode, implicit $exec
$vgpr9 = V_CNDMASK_B32_e32 $sgpr20, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
@@ -198,17 +192,17 @@ body: |
; SCHED: $vgpr0 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr1 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr2 = V_MOV_B32_e32 killed $vgpr0, implicit $exec
- ; SCHED-NEXT: $vgpr3 = V_ADD_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr3 = V_ADD_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_mov
; PAIR-GFX11: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr1 = IMPLICIT_DEF
- ; PAIR-GFX11-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx11 killed $vgpr0, killed $vgpr1, $vgpr1, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx11 killed $vgpr0, killed $vgpr1, $vgpr1, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_mov
; PAIR-GFX12: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr1 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx12 killed $vgpr0, killed $vgpr1, $vgpr1, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx12 killed $vgpr0, killed $vgpr1, $vgpr1, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec
@@ -226,17 +220,17 @@ body: |
; SCHED: $sgpr0 = IMPLICIT_DEF
; SCHED-NEXT: $sgpr7 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr2 = V_MOV_B32_e32 killed $sgpr0, implicit $exec
- ; SCHED-NEXT: $vgpr3 = V_MOV_B32_e32 killed $sgpr7, implicit $exec
+ ; SCHED-NEXT: $vgpr3 = V_MOV_B32_e32 killed $sgpr7, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_mov_mov
; PAIR-GFX11: $sgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $sgpr7 = IMPLICIT_DEF
- ; PAIR-GFX11-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx11 killed $sgpr0, killed $sgpr7, implicit $exec, implicit $exec, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx11 killed $sgpr0, killed $sgpr7, implicit $exec, implicit $exec, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_mov_mov
; PAIR-GFX12: $sgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $sgpr7 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 killed $sgpr0, killed $sgpr7, implicit $exec, implicit $exec, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 killed $sgpr0, killed $sgpr7, implicit $exec, implicit $exec, implicit killed $exec
$sgpr0 = IMPLICIT_DEF
$sgpr7 = IMPLICIT_DEF
$vgpr2 = V_MOV_B32_e32 $sgpr0, implicit $exec
@@ -257,7 +251,7 @@ body: |
; SCHED-NEXT: $vgpr1 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr3 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 100, killed $vgpr3, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 99, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 99, killed $vgpr1, killed $vgpr2, implicit killed $mode, implicit killed $exec
;
; PAIR-LABEL: name: vopd_constants_fail
; PAIR: $vgpr2 = IMPLICIT_DEF
@@ -265,12 +259,11 @@ body: |
; PAIR-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-NEXT: $vgpr3 = IMPLICIT_DEF
; PAIR-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 100, killed $vgpr3, implicit $mode, implicit $exec
- ; PAIR-NEXT: $vgpr2 = V_FMAC_F32_e32 99, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+ ; PAIR-NEXT: $vgpr2 = V_FMAC_F32_e32 99, killed $vgpr1, killed $vgpr2, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = IMPLICIT_DEF
$vgpr3 = IMPLICIT_DEF
- ; should not pair with two different literals
$vgpr2 = V_FMAC_F32_e32 99, $vgpr1, $vgpr2, implicit $mode, implicit $exec
$vgpr5 = V_FMAMK_F32 $vgpr0, 100, $vgpr3, implicit $mode, implicit $exec
@@ -287,26 +280,25 @@ body: |
; SCHED-NEXT: $vgpr1 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr3 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 100, killed $vgpr3, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 4, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 4, killed $vgpr1, killed $vgpr2, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_constants_inlinable
; PAIR-GFX11: $vgpr2 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr3 = IMPLICIT_DEF
- ; PAIR-GFX11-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx11 killed $vgpr0, 100, killed $vgpr3, 4, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx11 killed $vgpr0, 100, killed $vgpr3, 4, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_constants_inlinable
; PAIR-GFX12: $vgpr2 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr3 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx12 killed $vgpr0, 100, killed $vgpr3, 4, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx12 killed $vgpr0, 100, killed $vgpr3, 4, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = IMPLICIT_DEF
$vgpr3 = IMPLICIT_DEF
- ; can pair since 4 is inlinable
$vgpr2 = V_FMAC_F32_e32 4, $vgpr1, $vgpr2, implicit $mode, implicit $exec
$vgpr5 = V_FMAMK_F32 $vgpr0, 100, $vgpr3, implicit $mode, implicit $exec
@@ -325,26 +317,25 @@ body: |
; SCHED-NEXT: $vgpr1 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr3 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 100, killed $vgpr3, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 100, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 100, killed $vgpr1, killed $vgpr2, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_constants_same
; PAIR-GFX11: $vgpr2 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr3 = IMPLICIT_DEF
- ; PAIR-GFX11-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx11 killed $vgpr0, 100, killed $vgpr3, 100, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx11 killed $vgpr0, 100, killed $vgpr3, 100, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_constants_same
; PAIR-GFX12: $vgpr2 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr3 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx12 killed $vgpr0, 100, killed $vgpr3, 100, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx12 killed $vgpr0, 100, killed $vgpr3, 100, killed $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = IMPLICIT_DEF
$vgpr3 = IMPLICIT_DEF
- ; should be able to pair using 1 deduplicated literal
$vgpr2 = V_FMAC_F32_e32 100, $vgpr1, $vgpr2, implicit $mode, implicit $exec
$vgpr5 = V_FMAMK_F32 $vgpr0, 100, $vgpr3, implicit $mode, implicit $exec
@@ -360,20 +351,19 @@ body: |
; SCHED: $vgpr0 = IMPLICIT_DEF
; SCHED-NEXT: $sgpr0 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr1 = V_MOV_B32_e32 981467136, implicit $exec
- ; SCHED-NEXT: $vgpr2 = V_FMAAK_F32 killed $sgpr0, killed $vgpr0, 981467136, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr2 = V_FMAAK_F32 killed $sgpr0, killed $vgpr0, 981467136, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_mov_fmaak_constants_same
; PAIR-GFX11: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $sgpr0 = IMPLICIT_DEF
- ; PAIR-GFX11-NEXT: $vgpr1, $vgpr2 = V_DUAL_MOV_B32_e32_X_FMAAK_F32_gfx11 981467136, killed $sgpr0, killed $vgpr0, 981467136, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr1, $vgpr2 = V_DUAL_MOV_B32_e32_X_FMAAK_F32_gfx11 981467136, killed $sgpr0, killed $vgpr0, 981467136, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_mov_fmaak_constants_same
; PAIR-GFX12: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $sgpr0 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr1, $vgpr2 = V_DUAL_MOV_B32_e32_X_FMAAK_F32_gfx12 981467136, killed $sgpr0, killed $vgpr0, 981467136, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr1, $vgpr2 = V_DUAL_MOV_B32_e32_X_FMAAK_F32_gfx12 981467136, killed $sgpr0, killed $vgpr0, 981467136, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$sgpr0 = IMPLICIT_DEF
- ; should be able to pair using 1 deduplicated literal
$vgpr1 = V_MOV_B32_e32 981467136, implicit $exec
$vgpr2 = V_FMAAK_F32 $sgpr0, $vgpr0, 981467136, implicit $mode, implicit $exec
@@ -390,22 +380,21 @@ body: |
; SCHED-NEXT: $vgpr1 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr3 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
; SCHED-NEXT: DBG_VALUE $vgpr0, 0, 0
- ; SCHED-NEXT: $vgpr6 = V_MUL_F32_e32 killed $vgpr0, $vgpr0, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr6 = V_MUL_F32_e32 killed $vgpr0, $vgpr0, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_debug
; PAIR-GFX11: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr1 = IMPLICIT_DEF
- ; PAIR-GFX11-NEXT: $vgpr3, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx11 killed $vgpr1, $vgpr1, killed $vgpr0, $vgpr0, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr3, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx11 killed $vgpr1, $vgpr1, killed $vgpr0, $vgpr0, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
; PAIR-GFX11-NEXT: DBG_VALUE $vgpr0, 0, 0
;
; PAIR-GFX12-LABEL: name: vopd_debug
; PAIR-GFX12: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr1 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr3, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx12 killed $vgpr1, $vgpr1, killed $vgpr0, $vgpr0, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr3, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx12 killed $vgpr1, $vgpr1, killed $vgpr0, $vgpr0, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit killed $exec
; PAIR-GFX12-NEXT: DBG_VALUE $vgpr0, 0, 0
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
- ; TODO Debug values disable VOPD creation
$vgpr3 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
DBG_VALUE $vgpr0, 0, 0
$vgpr6 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
@@ -433,9 +422,9 @@ body: |
; SCHED-NEXT: $vgpr11 = V_CNDMASK_B32_e32 $vgpr0, killed $vgpr3, implicit $mode, implicit $exec, implicit $vcc
; SCHED-NEXT: $vgpr17 = V_MUL_F32_e32 killed $vgpr0, $vgpr0, implicit $mode, implicit $exec
; SCHED-NEXT: $vgpr10 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
- ; SCHED-NEXT: $vgpr15 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $vcc
+ ; SCHED-NEXT: $vgpr15 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit killed $vcc
; SCHED-NEXT: $vgpr16 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr14 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr14 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_schedule_unconstrained
; PAIR-GFX11: $vgpr2 = IMPLICIT_DEF
@@ -449,9 +438,9 @@ body: |
; PAIR-GFX11-NEXT: $vgpr12, $vgpr19 = V_DUAL_ADD_F32_e32_X_CNDMASK_B32_e32_gfx11 $vgpr1, $vgpr1, $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX11-NEXT: $vgpr11 = V_CNDMASK_B32_e32 $vgpr0, killed $vgpr3, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX11-NEXT: $vgpr17, $vgpr10 = V_DUAL_MUL_F32_e32_X_CNDMASK_B32_e32_gfx11 killed $vgpr0, $vgpr0, $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $vcc
- ; PAIR-GFX11-NEXT: $vgpr15 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $vcc
+ ; PAIR-GFX11-NEXT: $vgpr15 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit killed $vcc
; PAIR-GFX11-NEXT: $vgpr16 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; PAIR-GFX11-NEXT: $vgpr14 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr14 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_schedule_unconstrained
; PAIR-GFX12: $vgpr2 = IMPLICIT_DEF
@@ -465,9 +454,9 @@ body: |
; PAIR-GFX12-NEXT: $vgpr12, $vgpr19 = V_DUAL_ADD_F32_e32_X_CNDMASK_B32_e32_gfx12 $vgpr1, $vgpr1, $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX12-NEXT: $vgpr11 = V_CNDMASK_B32_e32 $vgpr0, killed $vgpr3, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX12-NEXT: $vgpr17, $vgpr10 = V_DUAL_MUL_F32_e32_X_CNDMASK_B32_e32_gfx12 killed $vgpr0, $vgpr0, $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $vcc
- ; PAIR-GFX12-NEXT: $vgpr15 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $vcc
+ ; PAIR-GFX12-NEXT: $vgpr15 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit killed $vcc
; PAIR-GFX12-NEXT: $vgpr16 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; PAIR-GFX12-NEXT: $vgpr14 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr14 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = IMPLICIT_DEF
@@ -478,13 +467,10 @@ body: |
$vgpr10 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
$vgpr4 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr6 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
- ; $vgpr9 = V_FMAMK_F32 $vgpr0, 10, $vgpr2, implicit $mode, implicit $exec
$vgpr11 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
$vgpr19 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
$vgpr12 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr17 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
- ; $vgpr18 = V_FMAMK_F32 $vgpr0, 10, $vgpr3, implicit $mode, implicit $exec
- ; $vgpr11 = V_FMAC_F32_e32 10, $vgpr1, $vgpr11, implicit $mode, implicit $exec
$vgpr15 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
$vgpr16 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr14 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
@@ -526,9 +512,9 @@ body: |
; SCHED-NEXT: $vgpr28 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
; SCHED-NEXT: $vgpr22 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
; SCHED-NEXT: $vgpr31 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr33 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $vcc
+ ; SCHED-NEXT: $vgpr33 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit killed $vcc
; SCHED-NEXT: $vgpr34 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; SCHED-NEXT: $vgpr32 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr32 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_schedule_unconstrained_2
; PAIR-GFX11: $vgpr2 = IMPLICIT_DEF
@@ -551,9 +537,9 @@ body: |
; PAIR-GFX11-NEXT: $vgpr28 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX11-NEXT: $vgpr22 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
; PAIR-GFX11-NEXT: $vgpr31 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; PAIR-GFX11-NEXT: $vgpr33 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $vcc
+ ; PAIR-GFX11-NEXT: $vgpr33 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit killed $vcc
; PAIR-GFX11-NEXT: $vgpr34 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; PAIR-GFX11-NEXT: $vgpr32 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr32 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_schedule_unconstrained_2
; PAIR-GFX12: $vgpr2 = IMPLICIT_DEF
@@ -576,9 +562,9 @@ body: |
; PAIR-GFX12-NEXT: $vgpr28 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
; PAIR-GFX12-NEXT: $vgpr22 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
; PAIR-GFX12-NEXT: $vgpr31 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; PAIR-GFX12-NEXT: $vgpr33 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $vcc
+ ; PAIR-GFX12-NEXT: $vgpr33 = V_CNDMASK_B32_e32 $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit killed $vcc
; PAIR-GFX12-NEXT: $vgpr34 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
- ; PAIR-GFX12-NEXT: $vgpr32 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr32 = V_SUB_F32_e32 killed $vgpr1, $vgpr1, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
$vgpr2 = IMPLICIT_DEF
@@ -589,13 +575,10 @@ body: |
$vgpr10 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
$vgpr4 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr6 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
- ; $vgpr9 = V_FMAMK_F32 $vgpr0, 10, $vgpr2, implicit $mode, implicit $exec
$vgpr11 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
$vgpr19 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
$vgpr12 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr17 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
- ; $vgpr18 = V_FMAMK_F32 $vgpr0, 10, $vgpr3, implicit $mode, implicit $exec
- ; $vgpr11 = V_FMAC_F32_e32 10, $vgpr1, $vgpr11, implicit $mode, implicit $exec
$vgpr15 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
$vgpr16 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr14 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
@@ -606,13 +589,10 @@ body: |
$vgpr28 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
$vgpr22 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr24 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
- ; $vgpr9 = V_FMAMK_F32 $vgpr0, 10, $vgpr2, implicit $mode, implicit $exec
$vgpr29 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
$vgpr37 = V_CNDMASK_B32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec, implicit $vcc
$vgpr31 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr35 = V_MUL_F32_e32 $vgpr0, $vgpr0, implicit $mode, implicit $exec
- ; $vgpr18 = V_FMAMK_F32 $vgpr0, 10, $vgpr3, implicit $mode, implicit $exec
- ; $vgpr11 = V_FMAC_F32_e32 10, $vgpr1, $vgpr11, implicit $mode, implicit $exec
$vgpr33 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $mode, implicit $exec, implicit $vcc
$vgpr34 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
$vgpr32 = V_SUB_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
@@ -628,27 +608,25 @@ body: |
; SCHED: $vgpr0 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr1 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr2 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
- ; SCHED-NEXT: $vgpr3 = V_ADD_F32_e32 killed $vgpr0, killed $vgpr1, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr3 = V_ADD_F32_e32 killed $vgpr0, killed $vgpr1, implicit killed $mode, implicit $exec
; SCHED-NEXT: $vgpr4 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
- ; SCHED-NEXT: $vgpr5 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
+ ; SCHED-NEXT: $vgpr5 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_mov_fixup
; PAIR-GFX11: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr1 = IMPLICIT_DEF
- ; PAIR-GFX11-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx11 target-flags(amdgpu-abs32-lo) @lds, killed $vgpr0, killed $vgpr1, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
- ; PAIR-GFX11-NEXT: $vgpr4, $vgpr5 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx11 target-flags(amdgpu-abs32-lo) @lds, target-flags(amdgpu-abs32-lo) @lds, implicit $exec, implicit $exec, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx11 target-flags(amdgpu-abs32-lo) @lds, killed $vgpr0, killed $vgpr1, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr4, $vgpr5 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx11 target-flags(amdgpu-abs32-lo) @lds, target-flags(amdgpu-abs32-lo) @lds, implicit $exec, implicit $exec, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_mov_fixup
; PAIR-GFX12: $vgpr0 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr1 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx12 target-flags(amdgpu-abs32-lo) @lds, killed $vgpr0, killed $vgpr1, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
- ; PAIR-GFX12-NEXT: $vgpr4, $vgpr5 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 target-flags(amdgpu-abs32-lo) @lds, target-flags(amdgpu-abs32-lo) @lds, implicit $exec, implicit $exec, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx12 target-flags(amdgpu-abs32-lo) @lds, killed $vgpr0, killed $vgpr1, implicit $exec, implicit $mode, implicit $exec, implicit killed $mode, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr4, $vgpr5 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 target-flags(amdgpu-abs32-lo) @lds, target-flags(amdgpu-abs32-lo) @lds, implicit $exec, implicit $exec, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
- ; should pair
$vgpr2 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
$vgpr3 = V_ADD_F32_e32 $vgpr0, $vgpr1, implicit $mode, implicit $exec
- ; should pair
$vgpr4 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
$vgpr5 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
...
@@ -660,11 +638,11 @@ body: |
bb.0:
; SCHED-LABEL: name: vopd_mov_fixup_fail
; SCHED: $vgpr0 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
- ; SCHED-NEXT: $vgpr1 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds + 4, implicit $exec
+ ; SCHED-NEXT: $vgpr1 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds + 4, implicit killed $exec
;
; PAIR-LABEL: name: vopd_mov_fixup_fail
; PAIR: $vgpr0 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
- ; PAIR-NEXT: $vgpr1 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds + 4, implicit $exec
+ ; PAIR-NEXT: $vgpr1 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds + 4, implicit killed $exec
$vgpr0 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds, implicit $exec
$vgpr1 = V_MOV_B32_e32 target-flags(amdgpu-abs32-lo) @lds + 4, implicit $exec
...
@@ -678,12 +656,12 @@ body: |
; SCHED-LABEL: name: vopd_no_combine_dependent_subreg
; SCHED: $vgpr0 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr2 = V_MOV_B32_e32 0, implicit-def $vgpr2_vgpr3, implicit $exec
- ; SCHED-NEXT: $vgpr5 = V_ADD_F32_e32 killed $vgpr0, killed $vgpr3, implicit $mode, implicit $exec
+ ; SCHED-NEXT: $vgpr5 = V_ADD_F32_e32 killed $vgpr0, killed $vgpr3, implicit killed $mode, implicit killed $exec
;
; PAIR-LABEL: name: vopd_no_combine_dependent_subreg
; PAIR: $vgpr0 = IMPLICIT_DEF
; PAIR-NEXT: $vgpr2 = V_MOV_B32_e32 0, implicit-def $vgpr2_vgpr3, implicit $exec
- ; PAIR-NEXT: $vgpr5 = V_ADD_F32_e32 killed $vgpr0, killed $vgpr3, implicit $mode, implicit $exec
+ ; PAIR-NEXT: $vgpr5 = V_ADD_F32_e32 killed $vgpr0, killed $vgpr3, implicit killed $mode, implicit killed $exec
$vgpr0 = IMPLICIT_DEF
$vgpr2 = V_MOV_B32_e32 0, implicit-def $vgpr2_vgpr3, implicit $exec
$vgpr5 = V_ADD_F32_e32 $vgpr0, $vgpr3, implicit $mode, implicit $exec
@@ -699,18 +677,18 @@ body: |
; SCHED: $vgpr1 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr5 = IMPLICIT_DEF
; SCHED-NEXT: $vgpr2 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
- ; SCHED-NEXT: $vgpr3 = V_MOV_B32_e32 killed $vgpr5, implicit $exec
+ ; SCHED-NEXT: $vgpr3 = V_MOV_B32_e32 killed $vgpr5, implicit killed $exec
;
; PAIR-GFX11-LABEL: name: vopd_mov_mov_same_src_bank
; PAIR-GFX11: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr5 = IMPLICIT_DEF
; PAIR-GFX11-NEXT: $vgpr2 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
- ; PAIR-GFX11-NEXT: $vgpr3 = V_MOV_B32_e32 killed $vgpr5, implicit $exec
+ ; PAIR-GFX11-NEXT: $vgpr3 = V_MOV_B32_e32 killed $vgpr5, implicit killed $exec
;
; PAIR-GFX12-LABEL: name: vopd_mov_mov_same_src_bank
; PAIR-GFX12: $vgpr1 = IMPLICIT_DEF
; PAIR-GFX12-NEXT: $vgpr5 = IMPLICIT_DEF
- ; PAIR-GFX12-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 killed $vgpr1, killed $vgpr5, implicit $exec, implicit $exec, implicit $exec
+ ; PAIR-GFX12-NEXT: $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_MOV_B32_e32_gfx12 killed $vgpr1, killed $vgpr5, implicit $exec, implicit $exec, implicit killed $exec
$vgpr1 = IMPLICIT_DEF
$vgpr5 = IMPLICIT_DEF
$vgpr2 = V_MOV_B32_e32 $vgpr1, implicit $exec
diff --git a/llvm/test/CodeGen/ARM/machine-outliner-thunk.ll b/llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
index 807e16202f2c51..f2a4b2100cc22f 100644
--- a/llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
+++ b/llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
@@ -13,37 +13,37 @@
declare i32 @thunk_called_fn(i32, i32, i32, i32)
define i32 @a() #0 {
-; ARM-LABEL: name: a
+; ARM-LABEL: name: a
; ARM: bb.0.entry:
; ARM-NEXT: liveins: $r11, $lr
-; ARM: $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r11, killed $lr
+; ARM: $sp = frame-setup STMDB_UPD killed $sp, 14 /* CC::al */, $noreg, killed $r11, killed $lr
; ARM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
; ARM-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
; ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r11, -8
; ARM-NEXT: BL @OUTLINED_FUNCTION_0{{.*}}
; ARM-NEXT: renamable $r0 = ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
-; ARM-NEXT: $sp = frame-destroy LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r11, def $pc, implicit killed $r0
+; ARM-NEXT: $sp = frame-destroy LDMIA_RET killed $sp, 14 /* CC::al */, $noreg, def $r11, def $pc, implicit killed $r0
-; THUMB-LABEL: name: a
+; THUMB-LABEL: name: a
; THUMB: bb.0.entry:
; THUMB-NEXT: liveins: $r7, $lr
-; THUMB: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr
+; THUMB: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit killed $sp
; THUMB-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
; THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
; THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8
-; THUMB-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0{{.*}}
+; THUMB-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $cpsr, implicit-def $lr, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, implicit $noreg, implicit $sp
; THUMB-NEXT: renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 8, 14 /* CC::al */, $noreg
-; THUMB-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc
+; THUMB-NEXT: frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc, implicit killed $r0
-; MACHO-LABEL: name: a
+; MACHO-LABEL: name: a
; MACHO: bb.0.entry:
; MACHO-NEXT: liveins: $lr
-; MACHO: early-clobber $sp = frame-setup t2STR_PRE killed $lr, $sp, -4, 14 /* CC::al */, $noreg
+; MACHO: early-clobber $sp = frame-setup t2STR_PRE killed $lr, killed $sp, -4, 14 /* CC::al */, $noreg
; MACHO-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 4
; MACHO-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
-; MACHO-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0{{.*}}
+; MACHO-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $cpsr, implicit-def $lr, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, implicit $noreg, implicit $sp
; MACHO-NEXT: renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 8, 14 /* CC::al */, $noreg
-; MACHO-NEXT: $lr, $sp = frame-destroy t2LDR_POST $sp, 4, 14 /* CC::al */, $noreg
+; MACHO-NEXT: $lr, $sp = frame-destroy t2LDR_POST killed $sp, 4, 14 /* CC::al */, $noreg
; MACHO-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
; THUMB1-NOT: OUTLINED_FUNCTION_0
@@ -55,37 +55,37 @@ entry:
}
define i32 @b() #0 {
-; ARM-LABEL: name: b
+; ARM-LABEL: name: b
; ARM: bb.0.entry:
; ARM-NEXT: liveins: $r11, $lr
-; ARM: $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r11, killed $lr
+; ARM: $sp = frame-setup STMDB_UPD killed $sp, 14 /* CC::al */, $noreg, killed $r11, killed $lr
; ARM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
; ARM-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
; ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r11, -8
; ARM-NEXT: BL @OUTLINED_FUNCTION_0{{.*}}
; ARM-NEXT: renamable $r0 = ADDri killed renamable $r0, 88, 14 /* CC::al */, $noreg, $noreg
-; ARM-NEXT: $sp = frame-destroy LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r11, def $pc, implicit killed $r0
+; ARM-NEXT: $sp = frame-destroy LDMIA_RET killed $sp, 14 /* CC::al */, $noreg, def $r11, def $pc, implicit killed $r0
-; THUMB-LABEL: name: b
+; THUMB-LABEL: name: b
; THUMB: bb.0.entry:
; THUMB-NEXT: liveins: $r7, $lr
-; THUMB: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr
-; THUMB-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
-; THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
-; THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8
-; THUMB-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0{{.*}}
-; THUMB-NEXT: renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 88, 14 /* CC::al */, $noreg
-; THUMB-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc
+; THUMB: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit killed $sp
+; THUMB-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
+; THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
+; THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8
+; THUMB-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $cpsr, implicit-def $lr, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, implicit $noreg, implicit $sp
+; THUMB-NEXT: renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 88, 14 /* CC::al */, $noreg
+; THUMB-NEXT: frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc, implicit killed $r0
-; MACHO-LABEL: name: b
+; MACHO-LABEL: name: b
; MACHO: bb.0.entry:
; MACHO-NEXT: liveins: $lr
-; MACHO: early-clobber $sp = frame-setup t2STR_PRE killed $lr, $sp, -4, 14 /* CC::al */, $noreg
+; MACHO: early-clobber $sp = frame-setup t2STR_PRE killed $lr, killed $sp, -4, 14 /* CC::al */, $noreg
; MACHO-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 4
; MACHO-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
-; MACHO-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0{{.*}}
+; MACHO-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $cpsr, implicit-def $lr, implicit-def $sp, implicit-def $r0, implicit-def $r1, implicit-def $r2, implicit-def $r3, implicit $noreg, implicit $sp
; MACHO-NEXT: renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 88, 14 /* CC::al */, $noreg
-; MACHO-NEXT: $lr, $sp = frame-destroy t2LDR_POST $sp, 4, 14 /* CC::al */, $noreg
+; MACHO-NEXT: $lr, $sp = frame-destroy t2LDR_POST killed $sp, 4, 14 /* CC::al */, $noreg
; MACHO-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
entry:
%call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4)
diff --git a/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir b/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir
index 9c94615406adb1..e6757c40150488 100644
--- a/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir
+++ b/llvm/test/CodeGen/PowerPC/fold-frame-offset-using-rr.mir
@@ -18,7 +18,7 @@ body: |
bb.0.entry:
liveins: $x3, $x1, $x4, $x6
$x3 = ADDI8 $x1, -80
- ; CHECK: $x3 = ADDI8 $x1, -76
+ ; CHECK: $x3 = ADDI8 killed $x1, -76
$x4 = ADD8 killed $x3, killed $x4
; CHECK-NOT: ADD8
$x6 = LD 4, killed $x4
@@ -34,7 +34,7 @@ body: |
bb.0.entry:
liveins: $x3, $x1, $x4, $x6
$x3 = ADDI8 $x1, -80
- ; CHECK: $x3 = ADDI8 $x1, -76
+ ; CHECK: $x3 = ADDI8 killed $x1, -76
$x3 = ADD8 killed $x3, killed $x4
; CHECK-NOT: ADD8
$x6 = LD 4, killed $x3
@@ -50,7 +50,7 @@ body: |
bb.0.entry:
liveins: $x3, $x1, $x4, $x6
$x3 = ADDI8 $x1, -80
- ; CHECK: $x3 = ADDI8 $x1, -80
+ ; CHECK: $x3 = ADDI8 killed $x1, -80
$x3 = ADD8 killed $x3, killed $x4
; CHECK: $x3 = ADD8 killed $x3, killed $x4
STD $x3, killed $x6, 100
@@ -68,7 +68,7 @@ body: |
bb.0.entry:
liveins: $x3, $x1, $x4, $x6
$x3 = ADDI8 $x1, -80
- ; CHECK: $x3 = ADDI8 $x1, -80
+ ; CHECK: $x3 = ADDI8 killed $x1, -80
STD $x3, killed $x6, 100
; CHECK: STD $x3, killed $x6, 100
$x3 = ADD8 killed $x3, killed $x4
@@ -86,7 +86,7 @@ body: |
bb.0.entry:
liveins: $x3, $x1, $x4, $x6
$x3 = ADDI8 $x1, -80
- ; CHECK: $x3 = ADDI8 $x1, -80
+ ; CHECK: $x3 = ADDI8 killed $x1, -80
$x4 = ADD8 $x3, killed $x4
; CHECK: $x4 = ADD8 $x3, killed $x4
STD killed $x3, killed $x6, 100
@@ -104,7 +104,7 @@ body: |
bb.0.entry:
liveins: $x3, $x1, $x4, $x6
$x3 = ADDI8 $x1, -80
- ; CHECK: $x3 = ADDI8 $x1, -80
+ ; CHECK: $x3 = ADDI8 killed $x1, -80
$x4 = ADD8 killed $x3, killed $x4
; CHECK: $x4 = ADD8 killed $x3, killed $x4
$x6 = LD 4, $x4
@@ -121,7 +121,7 @@ body: |
bb.0.entry:
liveins: $x3, $x1, $x4, $x5, $x6
$x3 = ADDI8 $x1, -80
- ; CHECK: $x3 = ADDI8 $x1, -80
+ ; CHECK: $x3 = ADDI8 killed $x1, -80
$x4 = ADD8 killed $x3, killed $x5
; CHECK: $x4 = ADD8 killed $x3, killed $x5
$x3 = LD 100, $x6
@@ -141,7 +141,7 @@ body: |
bb.0.entry:
liveins: $x3, $x1, $x4, $x5, $x6
$x3 = ADDI8 $x1, -80
- ; CHECK: $x3 = ADDI8 $x1, -80
+ ; CHECK: $x3 = ADDI8 killed $x1, -80
$x4 = ADD8 killed $x3, killed $x5
; CHECK: $x4 = ADD8 killed $x3, killed $x5
$x5 = LD 100, $x6
>From 36f1662a2aa1749e6db54e00ee306018ab27c132 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Wed, 6 Mar 2024 21:33:26 -0500
Subject: [PATCH 2/2] Update misched-branch-targets.mir
---
llvm/test/CodeGen/AArch64/misched-branch-targets.mir | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/CodeGen/AArch64/misched-branch-targets.mir b/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
index e1445d13c2f2b8..f24e0d39d34c65 100644
--- a/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
+++ b/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
@@ -65,7 +65,7 @@ body: |
# CHECK-NEXT: bb.0.entry:
# CHECK-NEXT: liveins: $w0, $w1, $w2, $lr
#
-# CHECK: frame-setup PAUTH_PROLOGUE implicit-def $lr, implicit $lr, implicit $sp
+# CHECK: frame-setup PAUTH_PROLOGUE implicit-def $lr, implicit killed $lr, implicit killed $sp
# CHECK-NEXT: $w8 = ADDWrs {{.*}}$w0, {{.*}}$w1, 0
# CHECK-NEXT: $w0 = MADDWrrr {{.*}}$w8, {{.*}}$w2, $wzr
# CHECK-NEXT: RET undef $lr, implicit {{.*}}$w0
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