[llvm] [ARM][AArch64] Enable FEAT_FHM, disable FEAT_MEC for Arm Neoverse N2 (PR #82613)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 22 04:48:16 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mc
Author: Jonathan Thackray (jthackray)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/82613.diff
7 Files Affected:
- (modified) llvm/include/llvm/TargetParser/AArch64TargetParser.h (+1-1)
- (modified) llvm/include/llvm/TargetParser/ARMTargetParser.def (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64.td (+2-2)
- (modified) llvm/lib/Target/ARM/ARM.td (+1)
- (modified) llvm/test/MC/AArch64/armv9a-mec.s (-1)
- (modified) llvm/test/MC/Disassembler/AArch64/armv9a-mec.txt (-1)
- (modified) llvm/unittests/TargetParser/TargetParserTest.cpp (+4-3)
``````````diff
diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 7376ac98a2b095..fe1dbb8bee411f 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -661,7 +661,7 @@ inline constexpr CpuInfo CpuInfos[] = {
{AArch64::AEK_BF16, AArch64::AEK_DOTPROD,
AArch64::AEK_FP16, AArch64::AEK_I8MM, AArch64::AEK_MTE,
AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_SVE,
- AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM}))},
+ AArch64::AEK_SVE2, AArch64::AEK_FP16FML, AArch64::AEK_SVE2BITPERM}))},
{"neoverse-512tvb", ARMV8_4A,
(AArch64::ExtensionBitset(
{AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3,
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index 1797a1b238d349..696ea67513866f 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -347,7 +347,7 @@ ARM_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("neoverse-n2", ARMV9A, FK_NEON_FP_ARMV8, false,
(ARM::AEK_BF16 | ARM::AEK_DOTPROD | ARM::AEK_I8MM | ARM::AEK_RAS |
- ARM::AEK_SB))
+ ARM::AEK_SB | ARM::AEK_FP16FML ))
ARM_CPU_NAME("neoverse-v1", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_BF16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 169b00e5ebc989..bc8a4cded8df1c 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -684,7 +684,7 @@ def HasV8_9aOps : SubtargetFeature<
def HasV9_0aOps : SubtargetFeature<
"v9a", "HasV9_0aOps", "true", "Support ARM v9a instructions",
- [HasV8_5aOps, FeatureMEC, FeatureSVE2]>;
+ [HasV8_5aOps, FeatureSVE2]>;
def HasV9_1aOps : SubtargetFeature<
"v9.1a", "HasV9_1aOps", "true", "Support ARM v9.1a instructions",
@@ -1516,7 +1516,7 @@ def ProcessorFeatures {
FeaturePerfMon];
list<SubtargetFeature> NeoverseN2 = [HasV9_0aOps, FeatureBF16, FeatureETE,
FeatureMatMulInt8, FeatureMTE, FeatureSVE2,
- FeatureSVE2BitPerm, FeatureTRBE,
+ FeatureSVE2BitPerm, FeatureTRBE, FeatureFP16FML,
FeaturePerfMon];
list<SubtargetFeature> Neoverse512TVB = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist,
FeatureCrypto, FeatureFPARMv8, FeatureFP16FML,
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 877781568307dc..b62e1a032631fd 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1682,6 +1682,7 @@ def : ProcNoItin<"neoverse-n1", [ARMv82a,
def : ProcNoItin<"neoverse-n2", [ARMv9a,
FeatureBF16,
+ FeatureFP16FML,
FeatureMatMulInt8]>;
def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift,
diff --git a/llvm/test/MC/AArch64/armv9a-mec.s b/llvm/test/MC/AArch64/armv9a-mec.s
index f2a5fe8d38fffb..42e4bf732086ea 100644
--- a/llvm/test/MC/AArch64/armv9a-mec.s
+++ b/llvm/test/MC/AArch64/armv9a-mec.s
@@ -1,5 +1,4 @@
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+mec < %s | FileCheck %s
-// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v9a < %s | FileCheck %s
// RUN: not llvm-mc -triple aarch64-none-linux-gnu < %s 2>&1 | FileCheck --check-prefix=CHECK-NO-MEC %s
mrs x0, MECIDR_EL2
diff --git a/llvm/test/MC/Disassembler/AArch64/armv9a-mec.txt b/llvm/test/MC/Disassembler/AArch64/armv9a-mec.txt
index d1cbfcdd08342f..44d630fabf5188 100644
--- a/llvm/test/MC/Disassembler/AArch64/armv9a-mec.txt
+++ b/llvm/test/MC/Disassembler/AArch64/armv9a-mec.txt
@@ -1,5 +1,4 @@
# RUN: llvm-mc -triple=aarch64 -mattr=+mec -disassemble %s | FileCheck %s
-# RUN: llvm-mc -triple=aarch64 -mattr=+v9a -disassemble %s | FileCheck %s
# RUN: llvm-mc -triple=aarch64 -disassemble %s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-MEC
[0xe0,0xa8,0x3c,0xd5]
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index e89fc687451cd7..297100441113a6 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -439,7 +439,7 @@ INSTANTIATE_TEST_SUITE_P(
ARM::AEK_HWDIVARM | ARM::AEK_MP | ARM::AEK_SEC |
ARM::AEK_VIRT | ARM::AEK_DSP | ARM::AEK_BF16 |
ARM::AEK_DOTPROD | ARM::AEK_RAS | ARM::AEK_I8MM |
- ARM::AEK_SB,
+ ARM::AEK_FP16FML | ARM::AEK_SB,
"9-A"),
ARMCPUTestParams<uint64_t>("neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8",
ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
@@ -1575,8 +1575,9 @@ INSTANTIATE_TEST_SUITE_P(
AArch64::AEK_SB, AArch64::AEK_SVE2,
AArch64::AEK_SVE2BITPERM, AArch64::AEK_BF16,
AArch64::AEK_I8MM, AArch64::AEK_JSCVT,
- AArch64::AEK_FCMA, AArch64::AEK_PAUTH})),
- "8.5-A"),
+ AArch64::AEK_FCMA, AArch64::AEK_PAUTH,
+ AArch64::AEK_FP16FML})),
+ "9-A"),
ARMCPUTestParams<AArch64::ExtensionBitset>(
"ampere1", "armv8.6-a", "crypto-neon-fp-armv8",
(AArch64::ExtensionBitset(
``````````
</details>
https://github.com/llvm/llvm-project/pull/82613
More information about the llvm-commits
mailing list