[llvm] Add support for atomic instruction on floating-point numbers (PR #81683)

Vyacheslav Levytskyy via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 15 02:21:56 PST 2024


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@@ -872,6 +873,44 @@ defm : DemangledGroupBuiltin<"group_non_uniform_scan_inclusive_logical_xors", Wo
 defm : DemangledGroupBuiltin<"group_non_uniform_scan_exclusive_logical_xors", WorkOrSub, OpGroupNonUniformLogicalXor>;
 defm : DemangledGroupBuiltin<"group_clustered_reduce_logical_xor", WorkOrSub, OpGroupNonUniformLogicalXor>;
 
+//===----------------------------------------------------------------------===//
+// Class defining an atomic instruction on floating-point numbers.
+//
+// name is the demangled name of the given builtin.
+// opcode specifies the SPIR-V operation code of the generated instruction.
+//===----------------------------------------------------------------------===//
+class AtomicFloatingBuiltin<string name, Op operation> {
+  string Name = name;
+  Op Opcode = operation;
+}
+
+// Table gathering all the Intel sub group builtins.
----------------
VyacheslavLevytskyy wrote:

Indeed, thank you

https://github.com/llvm/llvm-project/pull/81683


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