[llvm] WIP: AMDGPU: Document more backend recognized attributes (PR #80239)

Carl Ritson via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 10 23:40:17 PST 2024


================
@@ -1312,6 +1312,31 @@ The AMDGPU backend supports the following LLVM IR attributes.
                                              the frame. This is an internal detail of how LDS variables are lowered,
                                              language front ends should not set this attribute.
 
+    "amdgpu-gds-size"                        Bytes expected to be allocated at the start of GDS memory at entry.
+
+    "amdgpu-git-ptr-high"                    The hard-wired high half of the address of the global information table
+                                             for AMDPAL OS type. 0xffffffff represents no hard-wired high half, since
+                                             current hardware only allows a 16 bit value.
+
+    "amdgpu-32bit-address-high-bits"         Assumed high 32-bits for
+                                             32-bit address spaces which are really truncated
+                                             64-bit addresses (i.e., addrspace(6))
+
+    "amdgpu-color-export"                    Assumed 1 for :ref:`amdgpu_ps <amdgpu_ps>`, and 0 for other calling conventions.
+
+    "amdgpu-depth-export"                    ..TODO:: Describe.
----------------
perlfu wrote:

```
Indicates shader exports depth information if set to 1.
Determines the necessity and type of null exports when a shader terminates early by killing lanes.
A depth-only shader will export to depth channel when no null export target is available (GFX11+).
```

https://github.com/llvm/llvm-project/pull/80239


More information about the llvm-commits mailing list