[llvm] [MachinePipeliner] Fix missing requirements for tests (PR #80386)

Yuta Mukai via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 1 20:34:47 PST 2024


https://github.com/ytmukai created https://github.com/llvm/llvm-project/pull/80386

Add asserts requirements for tests that verify debug output.

>From a25413e2aca3366a20326db5a2d7c2d63f030eef Mon Sep 17 00:00:00 2001
From: Yuta Mukai <mukai.yuta at fujitsu.com>
Date: Fri, 2 Feb 2024 13:28:34 +0900
Subject: [PATCH] [MachinePipeliner] Fix missing requirements for tests

Add asserts requirements for tests that verify debug output.
---
 llvm/test/CodeGen/AArch64/sms-acceptable-loop1.mir   | 1 +
 llvm/test/CodeGen/AArch64/sms-acceptable-loop2.mir   | 1 +
 llvm/test/CodeGen/AArch64/sms-acceptable-loop3.mir   | 1 +
 llvm/test/CodeGen/AArch64/sms-acceptable-loop4.mir   | 1 +
 llvm/test/CodeGen/AArch64/sms-unacceptable-loop1.mir | 1 +
 llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir | 1 +
 llvm/test/CodeGen/AArch64/sms-unpipeline-insts1.mir  | 1 +
 llvm/test/CodeGen/AArch64/sms-unpipeline-insts2.mir  | 1 +
 8 files changed, 8 insertions(+)

diff --git a/llvm/test/CodeGen/AArch64/sms-acceptable-loop1.mir b/llvm/test/CodeGen/AArch64/sms-acceptable-loop1.mir
index ed2bd73a7861a..c552da3eca0c8 100644
--- a/llvm/test/CodeGen/AArch64/sms-acceptable-loop1.mir
+++ b/llvm/test/CodeGen/AArch64/sms-acceptable-loop1.mir
@@ -1,4 +1,5 @@
 # RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -debug-only=pipeliner 2>&1 | FileCheck %s
+# REQUIRES: asserts
 
 # An acceptable loop by pipeliner: TBB == ExitBB, FBB == LoopBB, Branch with NZCV flags
 # CHECK: Schedule Found? 1
diff --git a/llvm/test/CodeGen/AArch64/sms-acceptable-loop2.mir b/llvm/test/CodeGen/AArch64/sms-acceptable-loop2.mir
index 5cf6367354ecc..6171abc52bb93 100644
--- a/llvm/test/CodeGen/AArch64/sms-acceptable-loop2.mir
+++ b/llvm/test/CodeGen/AArch64/sms-acceptable-loop2.mir
@@ -1,4 +1,5 @@
 # RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -debug-only=pipeliner 2>&1 | FileCheck %s
+# REQUIRES: asserts
 
 # An acceptable loop by pipeliner: TBB == LoopBB, FBB == ExitBB, Branch with NZCV flags
 # CHECK: Schedule Found? 1
diff --git a/llvm/test/CodeGen/AArch64/sms-acceptable-loop3.mir b/llvm/test/CodeGen/AArch64/sms-acceptable-loop3.mir
index 652770e3fcfa8..94dd299d1caa7 100644
--- a/llvm/test/CodeGen/AArch64/sms-acceptable-loop3.mir
+++ b/llvm/test/CodeGen/AArch64/sms-acceptable-loop3.mir
@@ -1,4 +1,5 @@
 # RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -pipeliner-enable-copytophi=0 -debug-only=pipeliner 2>&1 | FileCheck %s
+# REQUIRES: asserts
 
 # An acceptable loop by pipeliner: TBB == ExitBB, FBB == LoopBB, Compare and branch
 # CHECK: Schedule Found? 1
diff --git a/llvm/test/CodeGen/AArch64/sms-acceptable-loop4.mir b/llvm/test/CodeGen/AArch64/sms-acceptable-loop4.mir
index 95d64cae5b780..fbd74a777aa1e 100644
--- a/llvm/test/CodeGen/AArch64/sms-acceptable-loop4.mir
+++ b/llvm/test/CodeGen/AArch64/sms-acceptable-loop4.mir
@@ -1,4 +1,5 @@
 # RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -pipeliner-enable-copytophi=0 -debug-only=pipeliner 2>&1 | FileCheck %s
+# REQUIRES: asserts
 
 # An acceptable loop by pipeliner TBB == LoopBB, FBB == ExitBB, Compare and branch
 # CHECK: Schedule Found? 1
diff --git a/llvm/test/CodeGen/AArch64/sms-unacceptable-loop1.mir b/llvm/test/CodeGen/AArch64/sms-unacceptable-loop1.mir
index 79dc1482c748f..42774732ecbad 100644
--- a/llvm/test/CodeGen/AArch64/sms-unacceptable-loop1.mir
+++ b/llvm/test/CodeGen/AArch64/sms-unacceptable-loop1.mir
@@ -1,4 +1,5 @@
 # RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -debug-only=pipeliner 2>&1 | FileCheck %s
+# REQUIRES: asserts
 
 # An unacceptable loop by pipeliner: No exits
 # CHECK: Unable to analyzeLoop, can NOT pipeline Loop
diff --git a/llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir b/llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir
index c3807ae272c6c..4f5b85f05e1c2 100644
--- a/llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir
+++ b/llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir
@@ -1,4 +1,5 @@
 # RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -pipeliner-enable-copytophi=0 -debug-only=pipeliner 2>&1 | FileCheck %s
+# REQUIRES: asserts
 
 # An unacceptable loop by pipeliner: The operand of the compare and branch is not defined in the loop
 # CHECK: Unable to analyzeLoop, can NOT pipeline Loop
diff --git a/llvm/test/CodeGen/AArch64/sms-unpipeline-insts1.mir b/llvm/test/CodeGen/AArch64/sms-unpipeline-insts1.mir
index 5973a44308253..fb28174a79a4a 100644
--- a/llvm/test/CodeGen/AArch64/sms-unpipeline-insts1.mir
+++ b/llvm/test/CodeGen/AArch64/sms-unpipeline-insts1.mir
@@ -1,4 +1,5 @@
 # RUN: llc --verify-machineinstrs -mtriple=aarch64 -mcpu=neoverse-n1 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -debug-only=pipeliner 2>&1 | FileCheck %s
+# REQUIRES: asserts
 
 # Check that instructions referencing NZCV are not pipelined
 
diff --git a/llvm/test/CodeGen/AArch64/sms-unpipeline-insts2.mir b/llvm/test/CodeGen/AArch64/sms-unpipeline-insts2.mir
index fdecbffdd4490..c5b76d88ff00d 100644
--- a/llvm/test/CodeGen/AArch64/sms-unpipeline-insts2.mir
+++ b/llvm/test/CodeGen/AArch64/sms-unpipeline-insts2.mir
@@ -1,4 +1,5 @@
 # RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -pipeliner-enable-copytophi=0 -debug-only=pipeliner 2>&1 | FileCheck %s
+# REQUIRES: asserts
 
 # An acceptable loop by pipeliner TBB == LoopBB, FBB == ExitBB, Compare and branch
 # CHECK: SU([[SU0:[0-9]+]]):   [[V0:%[0-9]+]]:gpr64common = SUBXri [[V1:%[0-9]+]]:gpr64common, 1, 0



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