[llvm] AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (PR #80003)

[Petar Avramovic via llvm-commits]

================
@@ -752,6 +752,17 @@ class MachineRegisterInfo {
   Register createVirtualRegister(const TargetRegisterClass *RegClass,
                                  StringRef Name = "");
 
+  /// All avilable attributes a virtual register can have.
+  struct RegisterAttributes {
----------------
petar-avramovic wrote:

Renamed it to VRegAttrs and added getVRegAttrs to fully hide LLT/RegClass from MachineSSAUpdater

https://github.com/llvm/llvm-project/pull/80003