[llvm] [X86] X86FixupVectorConstants - load+sign-extend vector constants that can be stored in a truncated form (PR #79815)

[Phoebe Wang via llvm-commits]

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@@ -750,7 +750,7 @@ define void @vec128_i16_widen_to_i32_factor2_broadcast_to_v4i32_factor4(ptr %in.
 ; AVX512BW-SLOW-LABEL: vec128_i16_widen_to_i32_factor2_broadcast_to_v4i32_factor4:
 ; AVX512BW-SLOW:       # %bb.0:
 ; AVX512BW-SLOW-NEXT:    vmovdqa64 (%rdi), %zmm0
-; AVX512BW-SLOW-NEXT:    vmovdqa {{.*#+}} xmm1 = [0,9,0,11,0,13,0,15]
+; AVX512BW-SLOW-NEXT:    vpmovsxbw {{.*#+}} xmm1 = [0,9,0,11,0,13,0,15]
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phoebewang wrote:

I don't get the point. Doesn't vzload have the same TP/ports with vextload?
And if vzload is preferred, why not a `vpmovzxbw` here?
My initial question was about "load size" vs. "inst cost", but we already using broadcast which has the cost too (e.g., vpbroadcastb/w). So it should not be a problem.

https://github.com/llvm/llvm-project/pull/79815