[llvm] [ARM][NEON] Add constraint to vld2 Odd/Even Pseudo instructions. (PR #79287)

[Eli Friedman via llvm-commits]

efriedma-quic wrote:

> By my interpretation the "input" register is there solely to allow the constraint that Odd and Even use the same output register range?

You have two pseudo-instructions: the first one writes to the low half of a pair of Q registers, the second writes to the high half of a pair of Q registers.  So each half of the pair is an "insert element" operation, which takes two vectors as input, and writes into half of each of them.  (The expansion ends up referring to D registers, not Q registers, but that's not relevant to how we treat them when they're still pseudos.)

If you think about it that way, each pseudo-instruction obviously has two inputs: the address, and the pair of vectors we're inserting into.

https://github.com/llvm/llvm-project/pull/79287