[llvm] [RISCV] Add IsSignExtendingOpW to amocas.w. (PR #79351)

[Jessica Clarke via llvm-commits]

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@@ -2,11 +2,15 @@
 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefix=RV32I %s
 ; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
-; RUN:   | FileCheck -check-prefix=RV32IA %s
+; RUN:   | FileCheck -check-prefixes=RV32IA,RV32IA-NOZACAS %s
+; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS %s
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jrtc27 wrote:

Why not just RV32IA and RV32IAZACAS? We don't say RV32I-NOA

https://github.com/llvm/llvm-project/pull/79351