[llvm] [AArch64] Disable variadic tail-calls for ARM64EC (PR #78914)

[Billy Laws via llvm-commits]

bylaws wrote:

> Is this supposed to be applied on top of #79067 ?
> 
> Briefly testing, it seems like the existing logic works correctly: if the argument list fits into four or less integer registers, we tail-call with a "stack size" of zero, and if there are more arguments, we refuse to tail-call.

The issue I ran into is that even when zero arguments are passed, the callee will still write the nonstack params to [x4-0x20,x4], so either x4 needs to point to 0x20 bytes of allocated stack space or the current SP, neither is the case in a tail call.

https://github.com/llvm/llvm-project/pull/78914