[llvm] [InstCombine] Add ctpop(A | B) + ctpop(A & B) -> ctpop(A) + ctpop(B) (PR #79089)

[via llvm-commits]

https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/79089

>From 9fbca7688170521e481a5934223320c601ee09a7 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Mon, 22 Jan 2024 22:06:36 -0500
Subject: [PATCH 1/2] [InstCombine] Add pre-commit tests (NFC)

---
 llvm/test/Transforms/InstCombine/ctpop.ll | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/llvm/test/Transforms/InstCombine/ctpop.ll b/llvm/test/Transforms/InstCombine/ctpop.ll
index dcea5fa87479eb..63169f1e6f8f28 100644
--- a/llvm/test/Transforms/InstCombine/ctpop.ll
+++ b/llvm/test/Transforms/InstCombine/ctpop.ll
@@ -264,6 +264,23 @@ define <2 x i32> @ctpop_add_no_common_bits_vec_use2(<2 x i32> %a, <2 x i32> %b,
   ret <2 x i32> %res
 }
 
+define i32 @ctpop_and_or_combine(i32 %a, i32 %b) {
+; CHECK-LABEL: @ctpop_and_or_combine(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[CTPOP1:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[AND]]), !range [[RNG1]]
+; CHECK-NEXT:    [[OR:%.*]] = or i32 [[A]], [[B]]
+; CHECK-NEXT:    [[CTPOP2:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[OR]]), !range [[RNG1]]
+; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw i32 [[CTPOP1]], [[CTPOP2]]
+; CHECK-NEXT:    ret i32 [[RES]]
+;
+  %and = and i32 %a, %b
+  %ctpop1 = tail call i32 @llvm.ctpop.i32(i32 %and)
+  %or = or i32 %a, %b
+  %ctpop2 = tail call i32 @llvm.ctpop.i32(i32 %or)
+  %res = add nuw nsw i32 %ctpop1, %ctpop2
+  ret i32 %res
+}
+
 define i8 @ctpop_rotate_left(i8 %a, i8 %amt)  {
 ; CHECK-LABEL: @ctpop_rotate_left(
 ; CHECK-NEXT:    [[RES:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]

>From f79f7b5c9342e1cb53d492d22cb46db25f9102d9 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Mon, 22 Jan 2024 20:38:11 -0500
Subject: [PATCH 2/2] [InstCombine] Add ctpop(A | B) + ctpop(A & B) -> ctpop(A)
 + ctpop(B)

---
 .../InstCombine/InstCombineAddSub.cpp         | 14 +++++++++++++
 llvm/test/Transforms/InstCombine/ctpop.ll     | 21 +++++++++++++++++--
 2 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index 8a00b75a1f7404..09a03008d743c0 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -1718,6 +1718,20 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
         Builder.CreateIntrinsic(Intrinsic::umax, {I.getType()}, {A, B}));
   }
 
+  // ctpop(A | B) + ctpop(A & B) => ctpop(A) + ctpop(B)
+  if ((match(LHS, m_OneUse(m_Intrinsic<Intrinsic::ctpop>(
+                      m_c_And(m_Value(A), m_Value(B))))) &&
+       (match(RHS, m_OneUse(m_Intrinsic<Intrinsic::ctpop>(
+                       m_c_Or(m_Specific(A), m_Specific(B))))))) ||
+      (match(LHS, m_OneUse(m_Intrinsic<Intrinsic::ctpop>(
+                      m_c_Or(m_Value(A), m_Value(B))))) &&
+       (match(RHS, m_OneUse(m_Intrinsic<Intrinsic::ctpop>(
+                       m_c_And(m_Specific(A), m_Specific(B)))))))) {
+    return BinaryOperator::CreateAdd(
+        Builder.CreateUnaryIntrinsic(Intrinsic::ctpop, A),
+        Builder.CreateUnaryIntrinsic(Intrinsic::ctpop, B));
+  }
+
   // ctpop(A) + ctpop(B) => ctpop(A | B) if A and B have no bits set in common.
   if (match(LHS, m_OneUse(m_Intrinsic<Intrinsic::ctpop>(m_Value(A)))) &&
       match(RHS, m_OneUse(m_Intrinsic<Intrinsic::ctpop>(m_Value(B)))) &&
diff --git a/llvm/test/Transforms/InstCombine/ctpop.ll b/llvm/test/Transforms/InstCombine/ctpop.ll
index 63169f1e6f8f28..396ae935c451e0 100644
--- a/llvm/test/Transforms/InstCombine/ctpop.ll
+++ b/llvm/test/Transforms/InstCombine/ctpop.ll
@@ -266,16 +266,33 @@ define <2 x i32> @ctpop_add_no_common_bits_vec_use2(<2 x i32> %a, <2 x i32> %b,
 
 define i32 @ctpop_and_or_combine(i32 %a, i32 %b) {
 ; CHECK-LABEL: @ctpop_and_or_combine(
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[A:%.*]]), !range [[RNG1]]
+; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.ctpop.i32(i32 [[B:%.*]]), !range [[RNG1]]
+; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT:    ret i32 [[RES]]
+;
+  %and = and i32 %a, %b
+  %ctpop1 = tail call i32 @llvm.ctpop.i32(i32 %and)
+  %or = or i32 %a, %b
+  %ctpop2 = tail call i32 @llvm.ctpop.i32(i32 %or)
+  %res = add nuw nsw i32 %ctpop1, %ctpop2
+  ret i32 %res
+}
+
+define i32 @ctpop_and_or_combine_no(i32 %a, i32 %b) {
+; CHECK-LABEL: @ctpop_and_or_combine_no(
 ; CHECK-NEXT:    [[AND:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[CTPOP1:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[AND]]), !range [[RNG1]]
-; CHECK-NEXT:    [[OR:%.*]] = or i32 [[A]], [[B]]
+; CHECK-NEXT:    [[B1:%.*]] = add i32 [[B]], 1
+; CHECK-NEXT:    [[OR:%.*]] = or i32 [[B1]], [[A]]
 ; CHECK-NEXT:    [[CTPOP2:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[OR]]), !range [[RNG1]]
 ; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw i32 [[CTPOP1]], [[CTPOP2]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %and = and i32 %a, %b
   %ctpop1 = tail call i32 @llvm.ctpop.i32(i32 %and)
-  %or = or i32 %a, %b
+  %b1 = add i32 %b, 1
+  %or = or i32 %a, %b1
   %ctpop2 = tail call i32 @llvm.ctpop.i32(i32 %or)
   %res = add nuw nsw i32 %ctpop1, %ctpop2
   ret i32 %res