[llvm] [JITLink][AArch32] Implement Armv5 ldr-pc stubs and use them for all pre-v7 targets (PR #79082)

Peter Smith via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 23 02:47:25 PST 2024


Stefan =?utf-8?q?Gränitz?= <stefan.graenitz at gmail.com>,
Stefan =?utf-8?q?Gränitz?= <stefan.graenitz at gmail.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/79082 at github.com>


================
@@ -341,6 +336,37 @@ class GOTBuilder : public TableManager<GOTBuilder> {
   Section *GOTSection = nullptr;
 };
 
+/// Stubs builder emits non-position-independent Arm stubs for pre-v7 CPUs.
+/// These architectures have no MovT/MovW instructions and don't support Thumb2.
+/// BL is the only Thumb instruction that can generate stubs and they can always
+/// be transformed into BLX.
----------------
smithp35 wrote:

Strictly speaking the stubs here require Arm V5 if Thumb is used. 

In V4T which is most commonly associated with the Arm7TDMI there is no BLX and LDR PC, [PC, #-4] doesn't change state so we have to load into R12 (AKA IP) and then BX R12.

My guess is that you are most interested in Arm v6 for JITLink and are unlikely to run on a V4 system.

Probably not worth anything more than a comment saying that v4T isn't supported as renaming everything prev7postv4 is going to look messy.



https://github.com/llvm/llvm-project/pull/79082


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