[llvm] [X86] X86FixupVectorConstants - shrink vector load to movsd/movsd/movd/movq 'zero upper' instructions (PR #79000)

[Simon Pilgrim via llvm-commits]

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@@ -263,6 +290,34 @@ bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
     return false;
   };
 
+  auto ConvertToZeroUpper = [&](unsigned OpUpper64, unsigned OpUpper32,
+                                unsigned OperandNo) {
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RKSimon wrote:

Not really, unless we ever have the need to support avx512 predicate move loads?

https://github.com/llvm/llvm-project/pull/79000