[llvm] [AArch64][PAC] Lower auth/resign into checked sequence. (PR #79024)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 22 10:01:30 PST 2024
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 30aa9fb4c1da33892a38f952fbdf6e7e45e5953a 20527de61d612da328144cb5e13b5ef16732ea86 -- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.h llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index b10c1c1712..922d57270f 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -68,14 +68,13 @@
using namespace llvm;
enum PtrauthCheckMode { Default, Unchecked, Poison, Trap };
-static cl::opt<PtrauthCheckMode>
-PtrauthAuthChecks("aarch64-ptrauth-auth-checks", cl::Hidden,
- cl::values(
- clEnumValN(Unchecked, "none", "don't test for failure"),
- clEnumValN(Poison, "poison", "poison on failure"),
- clEnumValN(Trap, "trap", "trap on failure")),
- cl::desc("Check pointer authentication auth/resign failures"),
- cl::init(Default));
+static cl::opt<PtrauthCheckMode> PtrauthAuthChecks(
+ "aarch64-ptrauth-auth-checks", cl::Hidden,
+ cl::values(clEnumValN(Unchecked, "none", "don't test for failure"),
+ clEnumValN(Poison, "poison", "poison on failure"),
+ clEnumValN(Trap, "trap", "trap on failure")),
+ cl::desc("Check pointer authentication auth/resign failures"),
+ cl::init(Default));
#define DEBUG_TYPE "asm-printer"
@@ -1443,29 +1442,26 @@ unsigned AArch64AsmPrinter::emitPtrauthDiscriminator(uint16_t Disc,
// If there's only a constant discriminator, MOV it into x17.
if (AddrDisc == AArch64::XZR) {
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::MOVZXi)
- .addReg(AArch64::X17)
- .addImm(Disc)
- .addImm(/*shift=*/0));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::MOVZXi)
+ .addReg(AArch64::X17)
+ .addImm(Disc)
+ .addImm(/*shift=*/0));
++InstsEmitted;
return AArch64::X17;
}
// If there are both, emit a blend into x17.
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::ORRXrs)
- .addReg(AArch64::X17)
- .addReg(AArch64::XZR)
- .addReg(AddrDisc)
- .addImm(0));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ORRXrs)
+ .addReg(AArch64::X17)
+ .addReg(AArch64::XZR)
+ .addReg(AddrDisc)
+ .addImm(0));
++InstsEmitted;
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::MOVKXi)
- .addReg(AArch64::X17)
- .addReg(AArch64::X17)
- .addImm(Disc)
- .addImm(/*shift=*/48));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::MOVKXi)
+ .addReg(AArch64::X17)
+ .addReg(AArch64::X17)
+ .addImm(Disc)
+ .addImm(/*shift=*/48));
++InstsEmitted;
return AArch64::X17;
}
@@ -1534,7 +1530,8 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(const MachineInstr *MI) {
// However, command-line flags can override this, for experimentation.
switch (PtrauthAuthChecks) {
- case PtrauthCheckMode::Default: break;
+ case PtrauthCheckMode::Default:
+ break;
case PtrauthCheckMode::Unchecked:
ShouldCheck = ShouldTrap = false;
break;
@@ -1555,7 +1552,8 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(const MachineInstr *MI) {
// Compute aut discriminator into x17
assert(isUInt<16>(AUTDisc));
- unsigned AUTDiscReg = emitPtrauthDiscriminator(AUTDisc, AUTAddrDisc, InstsEmitted);
+ unsigned AUTDiscReg =
+ emitPtrauthDiscriminator(AUTDisc, AUTAddrDisc, InstsEmitted);
bool AUTZero = AUTDiscReg == AArch64::XZR;
unsigned AUTOpc = getAUTOpcodeForKey(AUTKey, AUTZero);
@@ -1584,43 +1582,39 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(const MachineInstr *MI) {
// XPAC has tied src/dst: use x17 as a temporary copy.
// mov x17, x16
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::ORRXrs)
- .addReg(AArch64::X17)
- .addReg(AArch64::XZR)
- .addReg(AArch64::X16)
- .addImm(0));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ORRXrs)
+ .addReg(AArch64::X17)
+ .addReg(AArch64::XZR)
+ .addReg(AArch64::X16)
+ .addImm(0));
++InstsEmitted;
// xpaci x17
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(XPACOpc)
- .addReg(AArch64::X17)
- .addReg(AArch64::X17));
+ EmitToStreamer(
+ *OutStreamer,
+ MCInstBuilder(XPACOpc).addReg(AArch64::X17).addReg(AArch64::X17));
++InstsEmitted;
// cmp x16, x17
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::SUBSXrs)
- .addReg(AArch64::XZR)
- .addReg(AArch64::X16)
- .addReg(AArch64::X17)
- .addImm(0));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::SUBSXrs)
+ .addReg(AArch64::XZR)
+ .addReg(AArch64::X16)
+ .addReg(AArch64::X17)
+ .addImm(0));
++InstsEmitted;
// b.eq Lsuccess
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::Bcc)
- .addImm(AArch64CC::EQ)
- .addExpr(MCSymbolRefExpr::create(SuccessSym, OutContext)));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::Bcc)
+ .addImm(AArch64CC::EQ)
+ .addExpr(MCSymbolRefExpr::create(
+ SuccessSym, OutContext)));
++InstsEmitted;
if (ShouldTrap) {
// Trapping sequences do a 'brk'.
// brk #<0xc470 + aut key>
EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::BRK)
- .addImm(0xc470 | AUTKey));
+ MCInstBuilder(AArch64::BRK).addImm(0xc470 | AUTKey));
++InstsEmitted;
} else {
// Non-trapping checked sequences return the stripped result in x16,
@@ -1629,21 +1623,20 @@ void AArch64AsmPrinter::emitPtrauthAuthResign(const MachineInstr *MI) {
// FIXME: can we simply return the AUT result, already in x16? without..
// ..traps this is usable as an oracle anyway, based on high bits
// mov x17, x16
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::ORRXrs)
- .addReg(AArch64::X16)
- .addReg(AArch64::XZR)
- .addReg(AArch64::X17)
- .addImm(0));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::ORRXrs)
+ .addReg(AArch64::X16)
+ .addReg(AArch64::XZR)
+ .addReg(AArch64::X17)
+ .addImm(0));
++InstsEmitted;
if (IsAUTPAC) {
EndSym = createTempSymbol("resign_end_");
// b Lend
- EmitToStreamer(*OutStreamer,
- MCInstBuilder(AArch64::B)
- .addExpr(MCSymbolRefExpr::create(EndSym, OutContext)));
+ EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::B)
+ .addExpr(MCSymbolRefExpr::create(
+ EndSym, OutContext)));
++InstsEmitted;
}
}
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp b/llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
index 80d52506e8..d24d2c4263 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
@@ -116,7 +116,7 @@ AArch64GISelUtils::extractPtrauthBlendDiscriminators(Register Disc,
return std::make_tuple(ConstDisc, AddrDisc);
if (auto ConstDiscVal =
- getIConstantVRegVal(DiscMI->getOperand(3).getReg(), MRI)) {
+ getIConstantVRegVal(DiscMI->getOperand(3).getReg(), MRI)) {
if (isUInt<16>(ConstDiscVal->getZExtValue())) {
ConstDisc = ConstDiscVal->getZExtValue();
AddrDisc = DiscMI->getOperand(2).getReg();
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index ed52939590..3b58693379 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -6727,12 +6727,12 @@ bool AArch64InstructionSelector::selectIntrinsic(MachineInstr &I,
Register AUTAddrDisc = AUTDisc;
uint16_t AUTConstDiscC = 0;
std::tie(AUTConstDiscC, AUTAddrDisc) =
- extractPtrauthBlendDiscriminators(AUTDisc, MRI);
+ extractPtrauthBlendDiscriminators(AUTDisc, MRI);
Register PACAddrDisc = PACDisc;
uint16_t PACConstDiscC = 0;
std::tie(PACConstDiscC, PACAddrDisc) =
- extractPtrauthBlendDiscriminators(PACDisc, MRI);
+ extractPtrauthBlendDiscriminators(PACDisc, MRI);
MIB.buildCopy({AArch64::X16}, {ValReg});
MIB.buildInstr(TargetOpcode::IMPLICIT_DEF, {AArch64::X17}, {});
@@ -6759,7 +6759,7 @@ bool AArch64InstructionSelector::selectIntrinsic(MachineInstr &I,
Register AUTAddrDisc = AUTDisc;
uint16_t AUTConstDiscC = 0;
std::tie(AUTConstDiscC, AUTAddrDisc) =
- extractPtrauthBlendDiscriminators(AUTDisc, MRI);
+ extractPtrauthBlendDiscriminators(AUTDisc, MRI);
MIB.buildCopy({AArch64::X16}, {ValReg});
MIB.buildInstr(TargetOpcode::IMPLICIT_DEF, {AArch64::X17}, {});
``````````
</details>
https://github.com/llvm/llvm-project/pull/79024
More information about the llvm-commits
mailing list