[llvm] [AMDGPU] Rework architected SGPRs implementation (PR #79001)

[Matt Arsenault via llvm-commits]

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@@ -169,6 +169,15 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const Function &F,
     VGPRForAGPRCopy =
         AMDGPU::VGPR_32RegClass.getRegister(ST.getMaxNumVGPRs(F) - 1);
   }
+
+  if (STI->hasArchitectedSGPRs()) {
+    ArgInfo.ArchitectedWorkGroupIDX =
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arsenm wrote:

I think it's OK for the lowering to directly consume the hardcoded register numbers 

https://github.com/llvm/llvm-project/pull/79001