[llvm] [X86] Support encoding/decoding and lowering for APX variant SHL/SHR/SAR/SHLD/SHRD (PR #78853)

[via llvm-commits]

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@@ -0,0 +1,530 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
+
+define i8 @rol8m1(ptr %ptr) {
+; CHECK-LABEL: rol8m1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    rolb $1, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0x07,0x01]
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XinWang10 wrote:

Now we select mi first in isel and do the mi to m1/m8 compression in encoding optimization phase, we miss entry for ndd version in encoding optimization file, but we would do it after ndd all supported
https://github.com/llvm/llvm-project/pull/78545#:~:text=Wait...%20I%20think%20this%20should%20be%20landed%20after%20all%20NDD%20instructions%20are%20supported.

https://github.com/llvm/llvm-project/pull/78853