[clang] [llvm] [RISCV] Add Zicfiss support to the shadow call stack implementation. (PR #68075)

[Paul Kirth via llvm-commits]

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@@ -57,11 +57,16 @@ compiled application or the operating system. Integrating the runtime into
 the operating system should be preferred since otherwise all thread creation
 and destruction would need to be intercepted by the application.
 
-The instrumentation makes use of the platform register ``x18`` on AArch64 and
-``x3`` (``gp``) on RISC-V. For simplicity we will refer to this as the
-``SCSReg``. On some platforms, ``SCSReg`` is reserved, and on others, it is
-designated as a scratch register.  This generally means that any code that may
-run on the same thread as code compiled with ShadowCallStack must either target
+The instrumentation makes use of the platform register ``x18`` on AArch64,
+``x3`` (``gp``) on RISC-V with software shadow stack and ``ssp`` on RISC-V with
+hardware shadow stack, which needs `Zicfiss`_ and ``-mno-forced-sw-shadow-stack``
----------------
ilovepi wrote:

```suggestion
hardware shadow stack, which needs `Zicfiss`
```
I don't think that the default we want is `use SW shadow stack`, right? I think that using the SW based SCS should be something users opt into when `Zicfiss` is available, and shouldn't be something they have to opt out of...

https://github.com/llvm/llvm-project/pull/68075