[llvm] [X86][CodeGen] Support EVEX compression: NDD to nonNDD (PR #77731)

Phoebe Wang via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 11 00:24:27 PST 2024


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@@ -220,6 +220,29 @@ static bool performCustomAdjustments(MachineInstr &MI, unsigned NewOpc) {
   return true;
 }
 
+static bool isRedundantNewDataDest(MachineInstr &MI, const X86Subtarget &ST) {
+  // addq %rax, %rbx, %rbx / addq %rbx, %rax, %rbx -> addq %rax, %rbx
+  const MCInstrDesc &Desc = MI.getDesc();
+  Register Reg0 = MI.getOperand(0).getReg();
+  const MachineOperand &Op1 = MI.getOperand(1);
+  if (!Op1.isReg())
+    return false;
+  Register Reg1 = Op1.getReg();
+  if (Reg1 == Reg0)
+    return true;
+
+  bool IsCommutable = Desc.isCommutable();
+  unsigned NumOps = Desc.getNumOperands();
----------------
phoebewang wrote:

Do not need to define them since they are only used once.

https://github.com/llvm/llvm-project/pull/77731


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