[llvm] [AMDGPU] CodeGen for GFX12 8/16-bit SMEM loads (PR #77633)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 10 19:47:02 PST 2024


https://github.com/arsenm commented:

We have some combine logic specifically avoiding extload formation on the basis of sub-dword scalar loads not being supported. I assume those are updated in a later patch?

https://github.com/llvm/llvm-project/pull/77633


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