[llvm] 76482b7 - [SLSR] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 10 02:14:58 PST 2024
Author: Nikita Popov
Date: 2024-01-10T11:14:51+01:00
New Revision: 76482b74400cccae10d30195f6613f2bf538a43f
URL: https://github.com/llvm/llvm-project/commit/76482b74400cccae10d30195f6613f2bf538a43f
DIFF: https://github.com/llvm/llvm-project/commit/76482b74400cccae10d30195f6613f2bf538a43f.diff
LOG: [SLSR] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll b/llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
index e92b389c15ace2..6792f807a7458e 100644
--- a/llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
+++ b/llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
@@ -1,13 +1,24 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt -S -mtriple=amdgcn-- -passes=separate-const-offset-from-gep,slsr,gvn < %s | FileCheck %s
-; RUN: opt -S -mtriple=amdgcn-- -passes="separate-const-offset-from-gep,slsr,gvn" < %s | FileCheck %s
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
-; CHECK-LABEL: @slsr_after_reassociate_global_geps_mubuf_max_offset(
-; CHECK: [[b1:%[0-9]+]] = getelementptr float, ptr addrspace(1) %arr, i64 [[bump:%[0-9]+]]
-; CHECK: [[b2:%[0-9]+]] = getelementptr float, ptr addrspace(1) [[b1]], i64 [[bump]]
define amdgpu_kernel void @slsr_after_reassociate_global_geps_mubuf_max_offset(ptr addrspace(1) %out, ptr addrspace(1) noalias %arr, i32 %i) {
+; CHECK-LABEL: define amdgpu_kernel void @slsr_after_reassociate_global_geps_mubuf_max_offset(
+; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], ptr addrspace(1) noalias [[ARR:%.*]], i32 [[I:%.*]]) {
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = getelementptr float, ptr addrspace(1) [[ARR]], i64 [[TMP0]]
+; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[TMP1]], i64 1023
+; CHECK-NEXT: [[V11:%.*]] = load i32, ptr addrspace(1) [[P12]], align 4
+; CHECK-NEXT: store i32 [[V11]], ptr addrspace(1) [[OUT]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr addrspace(1) [[TMP1]], i64 [[TMP0]]
+; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[TMP2]], i64 1023
+; CHECK-NEXT: [[V22:%.*]] = load i32, ptr addrspace(1) [[P24]], align 4
+; CHECK-NEXT: store i32 [[V22]], ptr addrspace(1) [[OUT]], align 4
+; CHECK-NEXT: ret void
+;
bb:
%i2 = shl nsw i32 %i, 1
%j1 = add nsw i32 %i, 1023
@@ -25,12 +36,22 @@ bb:
ret void
}
-; CHECK-LABEL: @slsr_after_reassociate_global_geps_over_mubuf_max_offset(
-; CHECK: %j1 = add nsw i32 %i, 1024
-; CHECK: %tmp = sext i32 %j1 to i64
-; CHECK: getelementptr inbounds float, ptr addrspace(1) %arr, i64 %tmp
-; CHECK: getelementptr inbounds float, ptr addrspace(1) %arr, i64 %tmp5
define amdgpu_kernel void @slsr_after_reassociate_global_geps_over_mubuf_max_offset(ptr addrspace(1) %out, ptr addrspace(1) noalias %arr, i32 %i) {
+; CHECK-LABEL: define amdgpu_kernel void @slsr_after_reassociate_global_geps_over_mubuf_max_offset(
+; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], ptr addrspace(1) noalias [[ARR:%.*]], i32 [[I:%.*]]) {
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[J1:%.*]] = add nsw i32 [[I]], 1024
+; CHECK-NEXT: [[TMP:%.*]] = sext i32 [[J1]] to i64
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[ARR]], i64 [[TMP]]
+; CHECK-NEXT: [[V11:%.*]] = load i32, ptr addrspace(1) [[P1]], align 4
+; CHECK-NEXT: store i32 [[V11]], ptr addrspace(1) [[OUT]], align 4
+; CHECK-NEXT: [[J2:%.*]] = add i32 [[J1]], [[I]]
+; CHECK-NEXT: [[TMP5:%.*]] = sext i32 [[J2]] to i64
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[ARR]], i64 [[TMP5]]
+; CHECK-NEXT: [[V22:%.*]] = load i32, ptr addrspace(1) [[P2]], align 4
+; CHECK-NEXT: store i32 [[V22]], ptr addrspace(1) [[OUT]], align 4
+; CHECK-NEXT: ret void
+;
bb:
%i2 = shl nsw i32 %i, 1
%j1 = add nsw i32 %i, 1024
@@ -48,13 +69,21 @@ bb:
ret void
}
-; CHECK-LABEL: @slsr_after_reassociate_lds_geps_ds_max_offset(
-; CHECK: [[B1:%[0-9]+]] = getelementptr float, ptr addrspace(3) %arr, i32 %i
-; CHECK: getelementptr inbounds float, ptr addrspace(3) [[B1]], i32 16383
-; CHECK: [[B2:%[0-9]+]] = getelementptr float, ptr addrspace(3) [[B1]], i32 %i
-; CHECK: getelementptr inbounds float, ptr addrspace(3) [[B2]], i32 16383
define amdgpu_kernel void @slsr_after_reassociate_lds_geps_ds_max_offset(ptr addrspace(1) %out, ptr addrspace(3) noalias %arr, i32 %i) {
+; CHECK-LABEL: define amdgpu_kernel void @slsr_after_reassociate_lds_geps_ds_max_offset(
+; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], ptr addrspace(3) noalias [[ARR:%.*]], i32 [[I:%.*]]) {
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr float, ptr addrspace(3) [[ARR]], i32 [[I]]
+; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP0]], i32 16383
+; CHECK-NEXT: [[V11:%.*]] = load i32, ptr addrspace(3) [[P12]], align 4
+; CHECK-NEXT: store i32 [[V11]], ptr addrspace(1) [[OUT]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = getelementptr float, ptr addrspace(3) [[TMP0]], i32 [[I]]
+; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP1]], i32 16383
+; CHECK-NEXT: [[V22:%.*]] = load i32, ptr addrspace(3) [[P24]], align 4
+; CHECK-NEXT: store i32 [[V22]], ptr addrspace(1) [[OUT]], align 4
+; CHECK-NEXT: ret void
+;
bb:
%i2 = shl nsw i32 %i, 1
%j1 = add nsw i32 %i, 16383
@@ -70,12 +99,20 @@ bb:
ret void
}
-; CHECK-LABEL: @slsr_after_reassociate_lds_geps_over_ds_max_offset(
-; CHECK: %j1 = add nsw i32 %i, 16384
-; CHECK: getelementptr inbounds float, ptr addrspace(3) %arr, i32 %j1
-; CHECK: %j2 = add i32 %j1, %i
-; CHECK: getelementptr inbounds float, ptr addrspace(3) %arr, i32 %j2
define amdgpu_kernel void @slsr_after_reassociate_lds_geps_over_ds_max_offset(ptr addrspace(1) %out, ptr addrspace(3) noalias %arr, i32 %i) {
+; CHECK-LABEL: define amdgpu_kernel void @slsr_after_reassociate_lds_geps_over_ds_max_offset(
+; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], ptr addrspace(3) noalias [[ARR:%.*]], i32 [[I:%.*]]) {
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[J1:%.*]] = add nsw i32 [[I]], 16384
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[ARR]], i32 [[J1]]
+; CHECK-NEXT: [[V11:%.*]] = load i32, ptr addrspace(3) [[P1]], align 4
+; CHECK-NEXT: store i32 [[V11]], ptr addrspace(1) [[OUT]], align 4
+; CHECK-NEXT: [[J2:%.*]] = add i32 [[J1]], [[I]]
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[ARR]], i32 [[J2]]
+; CHECK-NEXT: [[V22:%.*]] = load i32, ptr addrspace(3) [[P2]], align 4
+; CHECK-NEXT: store i32 [[V22]], ptr addrspace(1) [[OUT]], align 4
+; CHECK-NEXT: ret void
+;
bb:
%i2 = shl nsw i32 %i, 1
%j1 = add nsw i32 %i, 16384
diff --git a/llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll b/llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
index 0ff4d2928c37dd..de085ef10c54fb 100644
--- a/llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
+++ b/llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
@@ -1,6 +1,6 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -passes=separate-const-offset-from-gep,slsr,gvn -S | FileCheck %s
; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix=PTX
-; RUN: opt < %s -passes="separate-const-offset-from-gep,slsr,gvn" -S | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-unknown-unknown"
@@ -28,7 +28,27 @@ target triple = "nvptx64-unknown-unknown"
; p4 = p3 + i
; *(p4 + 5)
define void @slsr_after_reassociate_geps(ptr %arr, i32 %i) {
-; CHECK-LABEL: @slsr_after_reassociate_geps(
+; CHECK-LABEL: define void @slsr_after_reassociate_geps(
+; CHECK-SAME: ptr [[ARR:%.*]], i32 [[I:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[ARR]], i64 [[TMP1]]
+; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i64 5
+; CHECK-NEXT: [[V1:%.*]] = load float, ptr [[P12]], align 4
+; CHECK-NEXT: call void @foo(float [[V1]])
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr float, ptr [[TMP2]], i64 [[TMP1]]
+; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds float, ptr [[TMP3]], i64 5
+; CHECK-NEXT: [[V2:%.*]] = load float, ptr [[P24]], align 4
+; CHECK-NEXT: call void @foo(float [[V2]])
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr float, ptr [[TMP3]], i64 [[TMP1]]
+; CHECK-NEXT: [[P36:%.*]] = getelementptr inbounds float, ptr [[TMP4]], i64 5
+; CHECK-NEXT: [[V3:%.*]] = load float, ptr [[P36]], align 4
+; CHECK-NEXT: call void @foo(float [[V3]])
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr float, ptr [[TMP4]], i64 [[TMP1]]
+; CHECK-NEXT: [[P48:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i64 5
+; CHECK-NEXT: [[V4:%.*]] = load float, ptr [[P48]], align 4
+; CHECK-NEXT: call void @foo(float [[V4]])
+; CHECK-NEXT: ret void
+;
; PTX-LABEL: .visible .func slsr_after_reassociate_geps(
; PTX: ld.param.u64 [[arr:%rd[0-9]+]], [slsr_after_reassociate_geps_param_0];
; PTX: ld.param.u32 [[i:%r[0-9]+]], [slsr_after_reassociate_geps_param_1];
@@ -38,7 +58,6 @@ define void @slsr_after_reassociate_geps(ptr %arr, i32 %i) {
%j1 = add nsw i32 %i, 5
%p1 = getelementptr inbounds float, ptr %arr, i32 %j1
-; CHECK: [[b1:%[0-9]+]] = getelementptr float, ptr %arr, i64 [[bump:%[0-9]+]]
; PTX: mul.wide.s32 [[i4:%rd[0-9]+]], [[i]], 4;
; PTX: add.s64 [[base1:%rd[0-9]+]], [[arr]], [[i4]];
%v1 = load float, ptr %p1, align 4
@@ -47,7 +66,6 @@ define void @slsr_after_reassociate_geps(ptr %arr, i32 %i) {
%j2 = add nsw i32 %i2, 5
%p2 = getelementptr inbounds float, ptr %arr, i32 %j2
-; CHECK: [[b2:%[0-9]+]] = getelementptr float, ptr [[b1]], i64 [[bump]]
; PTX: add.s64 [[base2:%rd[0-9]+]], [[base1]], [[i4]];
%v2 = load float, ptr %p2, align 4
; PTX: ld.f32 {{%f[0-9]+}}, [[[base2]]+20];
@@ -55,7 +73,6 @@ define void @slsr_after_reassociate_geps(ptr %arr, i32 %i) {
%j3 = add nsw i32 %i3, 5
%p3 = getelementptr inbounds float, ptr %arr, i32 %j3
-; CHECK: [[b3:%[0-9]+]] = getelementptr float, ptr [[b2]], i64 [[bump]]
; PTX: add.s64 [[base3:%rd[0-9]+]], [[base2]], [[i4]];
%v3 = load float, ptr %p3, align 4
; PTX: ld.f32 {{%f[0-9]+}}, [[[base3]]+20];
@@ -63,7 +80,6 @@ define void @slsr_after_reassociate_geps(ptr %arr, i32 %i) {
%j4 = add nsw i32 %i4, 5
%p4 = getelementptr inbounds float, ptr %arr, i32 %j4
-; CHECK: [[b4:%[0-9]+]] = getelementptr float, ptr [[b3]], i64 [[bump]]
; PTX: add.s64 [[base4:%rd[0-9]+]], [[base3]], [[i4]];
%v4 = load float, ptr %p4, align 4
; PTX: ld.f32 {{%f[0-9]+}}, [[[base4]]+20];
diff --git a/llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll b/llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
index 21699e7b3cbde8..b446a273d9bd50 100644
--- a/llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
+++ b/llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
@@ -1,5 +1,5 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -passes=slsr,gvn -S | FileCheck %s
-; RUN: opt < %s -passes='slsr,gvn' -S | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64-p:64:64:64-p1:32:32:32-p2:128:128:128:32"
@@ -14,19 +14,25 @@ target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64-p:64:64:64-p1:32:32:32-p2:
; p2 = p1 + s;
; foo(*p2);
define void @slsr_gep(ptr %input, i64 %s) {
-; CHECK-LABEL: @slsr_gep(
+; CHECK-LABEL: define void @slsr_gep(
+; CHECK-SAME: ptr [[INPUT:%.*]], i64 [[S:%.*]]) {
+; CHECK-NEXT: call void @foo(ptr [[INPUT]])
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, ptr [[INPUT]], i64 [[S]]
+; CHECK-NEXT: call void @foo(ptr [[P1]])
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[S]]
+; CHECK-NEXT: call void @foo(ptr [[P2]])
+; CHECK-NEXT: ret void
+;
; v0 = input[0];
call void @foo(ptr %input)
; v1 = input[s];
%p1 = getelementptr inbounds i32, ptr %input, i64 %s
-; CHECK: %p1 = getelementptr inbounds i32, ptr %input, i64 %s
call void @foo(ptr %p1)
; v2 = input[s * 2];
%s2 = shl nsw i64 %s, 1
%p2 = getelementptr inbounds i32, ptr %input, i64 %s2
-; CHECK: %p2 = getelementptr inbounds i32, ptr %p1, i64 %s
call void @foo(ptr %p2)
ret void
@@ -43,21 +49,28 @@ define void @slsr_gep(ptr %input, i64 %s) {
; p2 = p1 + (long)s;
; foo(*p2);
define void @slsr_gep_sext(ptr %input, i32 %s) {
-; CHECK-LABEL: @slsr_gep_sext(
+; CHECK-LABEL: define void @slsr_gep_sext(
+; CHECK-SAME: ptr [[INPUT:%.*]], i32 [[S:%.*]]) {
+; CHECK-NEXT: call void @foo(ptr [[INPUT]])
+; CHECK-NEXT: [[T:%.*]] = sext i32 [[S]] to i64
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, ptr [[INPUT]], i64 [[T]]
+; CHECK-NEXT: call void @foo(ptr [[P1]])
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[T]]
+; CHECK-NEXT: call void @foo(ptr [[P2]])
+; CHECK-NEXT: ret void
+;
; v0 = input[0];
call void @foo(ptr %input)
; v1 = input[s];
%t = sext i32 %s to i64
%p1 = getelementptr inbounds i32, ptr %input, i64 %t
-; CHECK: %p1 = getelementptr inbounds i32, ptr %input, i64 %t
call void @foo(ptr %p1)
; v2 = input[s * 2];
%s2 = shl nsw i32 %s, 1
%t2 = sext i32 %s2 to i64
%p2 = getelementptr inbounds i32, ptr %input, i64 %t2
-; CHECK: %p2 = getelementptr inbounds i32, ptr %p1, i64 %t
call void @foo(ptr %p2)
ret void
@@ -75,22 +88,29 @@ define void @slsr_gep_sext(ptr %input, i32 %s) {
; p2 = p1 + 5s;
; foo(*p2);
define void @slsr_gep_2d(ptr %input, i64 %s, i64 %t) {
-; CHECK-LABEL: @slsr_gep_2d(
+; CHECK-LABEL: define void @slsr_gep_2d(
+; CHECK-SAME: ptr [[INPUT:%.*]], i64 [[S:%.*]], i64 [[T:%.*]]) {
+; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds [10 x [5 x i32]], ptr [[INPUT]], i64 0, i64 [[S]], i64 [[T]]
+; CHECK-NEXT: call void @foo(ptr [[P0]])
+; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[S]], 5
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, ptr [[P0]], i64 [[TMP1]]
+; CHECK-NEXT: call void @foo(ptr [[P1]])
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, ptr [[P1]], i64 [[TMP1]]
+; CHECK-NEXT: call void @foo(ptr [[P2]])
+; CHECK-NEXT: ret void
+;
; v0 = input[s][t];
%p0 = getelementptr inbounds [10 x [5 x i32]], ptr %input, i64 0, i64 %s, i64 %t
call void @foo(ptr %p0)
; v1 = input[s * 2][t];
%s2 = shl nsw i64 %s, 1
-; CHECK: [[BUMP:%[a-zA-Z0-9]+]] = mul i64 %s, 5
%p1 = getelementptr inbounds [10 x [5 x i32]], ptr %input, i64 0, i64 %s2, i64 %t
-; CHECK: %p1 = getelementptr inbounds i32, ptr %p0, i64 [[BUMP]]
call void @foo(ptr %p1)
; v3 = input[s * 3][t];
%s3 = mul nsw i64 %s, 3
%p2 = getelementptr inbounds [10 x [5 x i32]], ptr %input, i64 0, i64 %s3, i64 %t
-; CHECK: %p2 = getelementptr inbounds i32, ptr %p1, i64 [[BUMP]]
call void @foo(ptr %p2)
ret void
@@ -105,70 +125,100 @@ define void @slsr_gep_2d(ptr %input, i64 %s, i64 %t) {
; rewrite the candidates using byte offset instead of index offset as in
; @slsr_gep_2d.
define void @slsr_gep_uglygep(ptr %input, i64 %s, i64 %t) {
-; CHECK-LABEL: @slsr_gep_uglygep(
+; CHECK-LABEL: define void @slsr_gep_uglygep(
+; CHECK-SAME: ptr [[INPUT:%.*]], i64 [[S:%.*]], i64 [[T:%.*]]) {
+; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds [10 x [5 x %struct.S]], ptr [[INPUT]], i64 0, i64 [[S]], i64 [[T]], i32 0
+; CHECK-NEXT: call void @bar(ptr [[P0]])
+; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[S]], 60
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 [[TMP1]]
+; CHECK-NEXT: call void @bar(ptr [[P1]])
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i8, ptr [[P1]], i64 [[TMP1]]
+; CHECK-NEXT: call void @bar(ptr [[P2]])
+; CHECK-NEXT: ret void
+;
; v0 = input[s][t].f1;
%p0 = getelementptr inbounds [10 x [5 x %struct.S]], ptr %input, i64 0, i64 %s, i64 %t, i32 0
call void @bar(ptr %p0)
; v1 = input[s * 2][t].f1;
%s2 = shl nsw i64 %s, 1
-; CHECK: [[BUMP:%[a-zA-Z0-9]+]] = mul i64 %s, 60
%p1 = getelementptr inbounds [10 x [5 x %struct.S]], ptr %input, i64 0, i64 %s2, i64 %t, i32 0
-; CHECK: %p1 = getelementptr inbounds i8, ptr %p0, i64 [[BUMP]]
call void @bar(ptr %p1)
; v2 = input[s * 3][t].f1;
%s3 = mul nsw i64 %s, 3
%p2 = getelementptr inbounds [10 x [5 x %struct.S]], ptr %input, i64 0, i64 %s3, i64 %t, i32 0
-; CHECK: %p2 = getelementptr inbounds i8, ptr %p1, i64 [[BUMP]]
call void @bar(ptr %p2)
ret void
}
define void @slsr_out_of_bounds_gep(ptr %input, i32 %s) {
-; CHECK-LABEL: @slsr_out_of_bounds_gep(
+; CHECK-LABEL: define void @slsr_out_of_bounds_gep(
+; CHECK-SAME: ptr [[INPUT:%.*]], i32 [[S:%.*]]) {
+; CHECK-NEXT: call void @foo(ptr [[INPUT]])
+; CHECK-NEXT: [[T:%.*]] = sext i32 [[S]] to i64
+; CHECK-NEXT: [[P1:%.*]] = getelementptr i32, ptr [[INPUT]], i64 [[T]]
+; CHECK-NEXT: call void @foo(ptr [[P1]])
+; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P1]], i64 [[T]]
+; CHECK-NEXT: call void @foo(ptr [[P2]])
+; CHECK-NEXT: ret void
+;
; v0 = input[0];
call void @foo(ptr %input)
; v1 = input[(long)s];
%t = sext i32 %s to i64
%p1 = getelementptr i32, ptr %input, i64 %t
-; CHECK: %p1 = getelementptr i32, ptr %input, i64 %t
call void @foo(ptr %p1)
; v2 = input[(long)(s * 2)];
%s2 = shl nsw i32 %s, 1
%t2 = sext i32 %s2 to i64
%p2 = getelementptr i32, ptr %input, i64 %t2
-; CHECK: %p2 = getelementptr i32, ptr %p1, i64 %t
call void @foo(ptr %p2)
ret void
}
define void @slsr_gep_128bit_index(ptr %input, i128 %s) {
-; CHECK-LABEL: @slsr_gep_128bit_index(
+; CHECK-LABEL: define void @slsr_gep_128bit_index(
+; CHECK-SAME: ptr [[INPUT:%.*]], i128 [[S:%.*]]) {
+; CHECK-NEXT: call void @foo(ptr [[INPUT]])
+; CHECK-NEXT: [[S125:%.*]] = shl nsw i128 [[S]], 125
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, ptr [[INPUT]], i128 [[S125]]
+; CHECK-NEXT: call void @foo(ptr [[P1]])
+; CHECK-NEXT: [[S126:%.*]] = shl nsw i128 [[S]], 126
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, ptr [[INPUT]], i128 [[S126]]
+; CHECK-NEXT: call void @foo(ptr [[P2]])
+; CHECK-NEXT: ret void
+;
; p0 = &input[0]
call void @foo(ptr %input)
; p1 = &input[s << 125]
%s125 = shl nsw i128 %s, 125
%p1 = getelementptr inbounds i32, ptr %input, i128 %s125
-; CHECK: %p1 = getelementptr inbounds i32, ptr %input, i128 %s125
call void @foo(ptr %p1)
; p2 = &input[s << 126]
%s126 = shl nsw i128 %s, 126
%p2 = getelementptr inbounds i32, ptr %input, i128 %s126
-; CHECK: %p2 = getelementptr inbounds i32, ptr %input, i128 %s126
call void @foo(ptr %p2)
ret void
}
define void @slsr_gep_32bit_pointer(ptr addrspace(1) %input, i64 %s) {
-; CHECK-LABEL: @slsr_gep_32bit_pointer(
+; CHECK-LABEL: define void @slsr_gep_32bit_pointer(
+; CHECK-SAME: ptr addrspace(1) [[INPUT:%.*]], i64 [[S:%.*]]) {
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[INPUT]], i64 [[S]]
+; CHECK-NEXT: call void @baz(ptr addrspace(1) [[P1]])
+; CHECK-NEXT: [[S2:%.*]] = mul nsw i64 [[S]], 2
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[INPUT]], i64 [[S2]]
+; CHECK-NEXT: call void @baz(ptr addrspace(1) [[P2]])
+; CHECK-NEXT: ret void
+;
; p1 = &input[s]
%p1 = getelementptr inbounds i32, ptr addrspace(1) %input, i64 %s
call void @baz(ptr addrspace(1) %p1)
@@ -177,7 +227,6 @@ define void @slsr_gep_32bit_pointer(ptr addrspace(1) %input, i64 %s) {
%s2 = mul nsw i64 %s, 2
%p2 = getelementptr inbounds i32, ptr addrspace(1) %input, i64 %s2
; %s2 is wider than the pointer size of addrspace(1), so do not factor it.
-; CHECK: %p2 = getelementptr inbounds i32, ptr addrspace(1) %input, i64 %s2
call void @baz(ptr addrspace(1) %p2)
ret void
@@ -185,13 +234,20 @@ define void @slsr_gep_32bit_pointer(ptr addrspace(1) %input, i64 %s) {
define void @slsr_gep_fat_pointer(ptr addrspace(2) %input, i32 %s) {
; p1 = &input[s]
+; CHECK-LABEL: define void @slsr_gep_fat_pointer(
+; CHECK-SAME: ptr addrspace(2) [[INPUT:%.*]], i32 [[S:%.*]]) {
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, ptr addrspace(2) [[INPUT]], i32 [[S]]
+; CHECK-NEXT: call void @baz2(ptr addrspace(2) [[P1]])
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, ptr addrspace(2) [[P1]], i32 [[S]]
+; CHECK-NEXT: call void @baz2(ptr addrspace(2) [[P2]])
+; CHECK-NEXT: ret void
+;
%p1 = getelementptr inbounds i32, ptr addrspace(2) %input, i32 %s
call void @baz2(ptr addrspace(2) %p1)
; p2 = &input[s * 2]
%s2 = mul nsw i32 %s, 2
%p2 = getelementptr inbounds i32, ptr addrspace(2) %input, i32 %s2
-; CHECK: %p2 = getelementptr inbounds i32, ptr addrspace(2) %p1, i32 %s
; Use index bitwidth, not pointer size (i128)
call void @baz2(ptr addrspace(2) %p2)
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