[llvm] [RISCV] Merge machine operand flag MO_PLT into MO_CALL (PR #77253)
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 7 12:38:59 PST 2024
https://github.com/MaskRay created https://github.com/llvm/llvm-project/pull/77253
Since #72467, "@plt" in assembly output "call foo at plt" is omitted. We
can trivially merge MO_PLT and MO_CALL without any functional change to
assembly/relocatable file output.
Earlier architectures use different call relocation types whether a PLT
is potentially needed: R_386_PLT32/R_386_PC32, R_68K_PLT32/R_68K_PC32,
R_SPARC_WDISP30/R_SPARC_WPLT320. However, as the PLT property is
per-symbol instead of per-call-site and linker can optimize out a PLT,
the distinction has been confusing.
Arm made good names R_ARM_CALL/R_AARCH64_CALL. Let's use MO_CALL instead
of MO_PLT.
As follow-ups, we can merge fixup_riscv_call/fixup_riscv_call_plt and
VK_RISCV_CALL/VK_RISCV_CALL_PLT.
>From 7d0e46b06b082cb41efab85d179891aa8baac6be Mon Sep 17 00:00:00 2001
From: Fangrui Song <i at maskray.me>
Date: Sun, 7 Jan 2024 12:38:49 -0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
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Created using spr 1.3.4
---
.../Target/RISCV/GISel/RISCVCallLowering.cpp | 2 +-
.../Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 1 -
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 3 -
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 15 +---
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 1 -
.../calling-conv-ilp32-ilp32f-common.ll | 8 +--
...calling-conv-ilp32-ilp32f-ilp32d-common.ll | 30 ++++----
.../irtranslator/calling-conv-ilp32.ll | 6 +-
.../irtranslator/calling-conv-ilp32d.ll | 12 ++--
.../calling-conv-ilp32f-ilp32d-common.ll | 20 +++---
.../calling-conv-lp64-lp64f-common.ll | 8 +--
.../calling-conv-lp64-lp64f-lp64d-common.ll | 30 ++++----
.../irtranslator/calling-conv-lp64.ll | 6 +-
.../irtranslator/calling-conv-lp64d.ll | 10 +--
.../RISCV/GlobalISel/irtranslator/calls.ll | 64 ++++++++---------
.../RISCV/GlobalISel/irtranslator/vararg.ll | 70 +++++++++----------
.../GlobalISel/irtranslator/variadic-call.ll | 4 +-
.../legalizer/legalize-div-rv32.mir | 32 ++++-----
.../legalizer/legalize-div-rv64.mir | 36 +++++-----
.../legalizer/legalize-fp-ceil-floor.mir | 8 +--
.../legalizer/legalize-mul-rv32.mir | 12 ++--
.../legalizer/legalize-mul-rv64.mir | 14 ++--
.../legalizer/legalize-mulo-rv32.mir | 12 ++--
.../legalizer/legalize-mulo-rv64.mir | 16 ++---
.../legalizer/legalize-rem-rv32.mir | 32 ++++-----
.../legalizer/legalize-rem-rv64.mir | 36 +++++-----
.../test/CodeGen/RISCV/float-select-verify.ll | 4 +-
llvm/test/CodeGen/RISCV/live-sp.mir | 4 +-
llvm/test/CodeGen/RISCV/make-compressible.mir | 24 +++----
llvm/test/CodeGen/RISCV/mir-target-flags.ll | 8 +--
.../RISCV/out-of-reach-emergency-slot.mir | 2 +-
.../RISCV/rvv/addi-rvv-stack-object.mir | 2 +-
.../rvv/fixed-vectors-emergency-slot.mir | 2 +-
.../RISCV/rvv/large-rvv-stack-size.mir | 2 +-
.../CodeGen/RISCV/rvv/rvv-stack-align.mir | 6 +-
.../rvv/wrong-stack-offset-for-rvv-object.mir | 4 +-
llvm/test/CodeGen/RISCV/vector-abi.ll | 4 +-
37 files changed, 267 insertions(+), 283 deletions(-)
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
index 50ed85acdec00a..697ad476ff8c91 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
@@ -579,7 +579,7 @@ bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
// Select the recommended relocation type R_RISCV_CALL_PLT.
if (!Info.Callee.isReg())
- Info.Callee.setTargetFlags(RISCVII::MO_PLT);
+ Info.Callee.setTargetFlags(RISCVII::MO_CALL);
MachineInstrBuilder Call =
MIRBuilder
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
index c32210fc141921..433e2e6f80bd68 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
@@ -254,7 +254,6 @@ static inline bool isFirstDefTiedToFirstUse(const MCInstrDesc &Desc) {
enum {
MO_None = 0,
MO_CALL = 1,
- MO_PLT = 2,
MO_LO = 3,
MO_HI = 4,
MO_PCREL_LO = 5,
diff --git a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
index 0fd514fa87cd2f..f2bd5118fc0717 100644
--- a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -747,9 +747,6 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
Kind = RISCVMCExpr::VK_RISCV_None;
break;
case RISCVII::MO_CALL:
- Kind = RISCVMCExpr::VK_RISCV_CALL;
- break;
- case RISCVII::MO_PLT:
Kind = RISCVMCExpr::VK_RISCV_CALL_PLT;
break;
case RISCVII::MO_LO:
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index bc4b2b022c0ae9..79c16cf4c4c361 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -18215,20 +18215,9 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
// split it and then direct call can be matched by PseudoCALL.
if (GlobalAddressSDNode *S = dyn_cast<GlobalAddressSDNode>(Callee)) {
const GlobalValue *GV = S->getGlobal();
-
- unsigned OpFlags = RISCVII::MO_CALL;
- if (!getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(), GV))
- OpFlags = RISCVII::MO_PLT;
-
- Callee = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, OpFlags);
+ Callee = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, RISCVII::MO_CALL);
} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
- unsigned OpFlags = RISCVII::MO_CALL;
-
- if (!getTargetMachine().shouldAssumeDSOLocal(*MF.getFunction().getParent(),
- nullptr))
- OpFlags = RISCVII::MO_PLT;
-
- Callee = DAG.getTargetExternalSymbol(S->getSymbol(), PtrVT, OpFlags);
+ Callee = DAG.getTargetExternalSymbol(S->getSymbol(), PtrVT, RISCVII::MO_CALL);
}
// The first call operand is the chain and the second is the target address.
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index cd98438eed8821..7f6a045a7d042f 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -2365,7 +2365,6 @@ RISCVInstrInfo::getSerializableDirectMachineOperandTargetFlags() const {
using namespace RISCVII;
static const std::pair<unsigned, const char *> TargetFlags[] = {
{MO_CALL, "riscv-call"},
- {MO_PLT, "riscv-plt"},
{MO_LO, "riscv-lo"},
{MO_HI, "riscv-hi"},
{MO_PCREL_LO, "riscv-pcrel-lo"},
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
index 226f2eb976e723..b87cc7869a467d 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
@@ -40,7 +40,7 @@ define i32 @caller_double_in_regs() nounwind {
; ILP32-NEXT: $x10 = COPY [[C]](s32)
; ILP32-NEXT: $x11 = COPY [[UV]](s32)
; ILP32-NEXT: $x12 = COPY [[UV1]](s32)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: $x10 = COPY [[COPY]](s32)
@@ -55,7 +55,7 @@ define i32 @caller_double_in_regs() nounwind {
; ILP32F-NEXT: $x10 = COPY [[C]](s32)
; ILP32F-NEXT: $x11 = COPY [[UV]](s32)
; ILP32F-NEXT: $x12 = COPY [[UV1]](s32)
- ; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
@@ -79,7 +79,7 @@ define i64 @caller_small_scalar_ret() nounwind {
; ILP32-LABEL: name: caller_small_scalar_ret
; ILP32: bb.1 (%ir-block.0):
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -92,7 +92,7 @@ define i64 @caller_small_scalar_ret() nounwind {
; ILP32F-LABEL: name: caller_small_scalar_ret
; ILP32F: bb.1 (%ir-block.0):
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
index cc48392e9ea8ed..1a3489521af19c 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
@@ -44,7 +44,7 @@ define i32 @caller_i64_in_regs() nounwind {
; ILP32-NEXT: $x10 = COPY [[C]](s32)
; ILP32-NEXT: $x11 = COPY [[UV]](s32)
; ILP32-NEXT: $x12 = COPY [[UV1]](s32)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: $x10 = COPY [[COPY]](s32)
@@ -59,7 +59,7 @@ define i32 @caller_i64_in_regs() nounwind {
; ILP32F-NEXT: $x10 = COPY [[C]](s32)
; ILP32F-NEXT: $x11 = COPY [[UV]](s32)
; ILP32F-NEXT: $x12 = COPY [[UV1]](s32)
- ; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
@@ -74,7 +74,7 @@ define i32 @caller_i64_in_regs() nounwind {
; ILP32D-NEXT: $x10 = COPY [[C]](s32)
; ILP32D-NEXT: $x11 = COPY [[UV]](s32)
; ILP32D-NEXT: $x12 = COPY [[UV1]](s32)
- ; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
@@ -162,7 +162,7 @@ define i32 @caller_many_scalars() nounwind {
; ILP32-NEXT: $x15 = COPY [[C4]](s32)
; ILP32-NEXT: $x16 = COPY [[C5]](s32)
; ILP32-NEXT: $x17 = COPY [[UV2]](s32)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -198,7 +198,7 @@ define i32 @caller_many_scalars() nounwind {
; ILP32F-NEXT: $x15 = COPY [[C4]](s32)
; ILP32F-NEXT: $x16 = COPY [[C5]](s32)
; ILP32F-NEXT: $x17 = COPY [[UV2]](s32)
- ; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
+ ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32F-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -234,7 +234,7 @@ define i32 @caller_many_scalars() nounwind {
; ILP32D-NEXT: $x15 = COPY [[C4]](s32)
; ILP32D-NEXT: $x16 = COPY [[C5]](s32)
; ILP32D-NEXT: $x17 = COPY [[UV2]](s32)
- ; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
+ ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32D-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -261,7 +261,7 @@ define i32 @caller_small_scalar_ret() nounwind {
; ILP32: bb.1 (%ir-block.0):
; ILP32-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -275,7 +275,7 @@ define i32 @caller_small_scalar_ret() nounwind {
; ILP32F: bb.1 (%ir-block.0):
; ILP32F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -289,7 +289,7 @@ define i32 @caller_small_scalar_ret() nounwind {
; ILP32D: bb.1 (%ir-block.0):
; ILP32D-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -323,7 +323,7 @@ define i32 @caller_small_struct_ret() nounwind {
; ILP32-LABEL: name: caller_small_struct_ret
; ILP32: bb.1 (%ir-block.0):
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -335,7 +335,7 @@ define i32 @caller_small_struct_ret() nounwind {
; ILP32F-LABEL: name: caller_small_struct_ret
; ILP32F: bb.1 (%ir-block.0):
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -347,7 +347,7 @@ define i32 @caller_small_struct_ret() nounwind {
; ILP32D-LABEL: name: caller_small_struct_ret
; ILP32D: bb.1 (%ir-block.0):
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -404,7 +404,7 @@ define i32 @caller_large_struct_ret() nounwind {
; ILP32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
; ILP32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
@@ -419,7 +419,7 @@ define i32 @caller_large_struct_ret() nounwind {
; ILP32F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
- ; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
+ ; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
; ILP32F-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
@@ -434,7 +434,7 @@ define i32 @caller_large_struct_ret() nounwind {
; ILP32D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
- ; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
+ ; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
; ILP32D-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
index 9426c77081e4cf..93649b5f60f7b2 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
@@ -31,7 +31,7 @@ define i32 @caller_float_in_regs() nounwind {
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: $x10 = COPY [[C]](s32)
; RV32I-NEXT: $x11 = COPY [[C1]](s32)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: $x10 = COPY [[COPY]](s32)
@@ -94,7 +94,7 @@ define i32 @caller_float_on_stack() nounwind {
; RV32I-NEXT: $x15 = COPY [[UV5]](s32)
; RV32I-NEXT: $x16 = COPY [[UV6]](s32)
; RV32I-NEXT: $x17 = COPY [[UV7]](s32)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_on_stack, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_on_stack, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -116,7 +116,7 @@ define i32 @caller_tiny_scalar_ret() nounwind {
; RV32I-LABEL: name: caller_tiny_scalar_ret
; RV32I: bb.1 (%ir-block.0):
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: $x10 = COPY [[COPY]](s32)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
index 8aaf9abaf364bd..4d487eb5cda23d 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
@@ -30,7 +30,7 @@ define i32 @caller_double_in_fpr() nounwind {
; RV32-ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: $x10 = COPY [[C]](s32)
; RV32-ILP32D-NEXT: $f10_d = COPY [[C1]](s64)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_fpr, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $f10_d, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_fpr, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $f10_d, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
@@ -96,7 +96,7 @@ define i32 @caller_double_in_fpr_exhausted_gprs() nounwind {
; RV32-ILP32D-NEXT: $x16 = COPY [[UV6]](s32)
; RV32-ILP32D-NEXT: $x17 = COPY [[UV7]](s32)
; RV32-ILP32D-NEXT: $f10_d = COPY [[C5]](s64)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_fpr_exhausted_gprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_d, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_fpr_exhausted_gprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_d, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -158,7 +158,7 @@ define i32 @caller_double_in_gpr_exhausted_fprs() nounwind {
; RV32-ILP32D-NEXT: $f17_d = COPY [[C7]](s64)
; RV32-ILP32D-NEXT: $x10 = COPY [[UV]](s32)
; RV32-ILP32D-NEXT: $x11 = COPY [[UV1]](s32)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_gpr_exhausted_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit $f11_d, implicit $f12_d, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit $x10, implicit $x11, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_gpr_exhausted_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit $f11_d, implicit $f12_d, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit $x10, implicit $x11, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
@@ -247,7 +247,7 @@ define i32 @caller_double_in_gpr_and_stack_almost_exhausted_gprs_fprs() nounwind
; RV32-ILP32D-NEXT: $f16_d = COPY [[C10]](s64)
; RV32-ILP32D-NEXT: $f17_d = COPY [[C11]](s64)
; RV32-ILP32D-NEXT: $x17 = COPY [[UV6]](s32)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_gpr_and_stack_almost_exhausted_gprs_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_d, implicit $x12, implicit $x13, implicit $f11_d, implicit $x14, implicit $x15, implicit $f12_d, implicit $x16, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit $x17, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_gpr_and_stack_almost_exhausted_gprs_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_d, implicit $x12, implicit $x13, implicit $f11_d, implicit $x14, implicit $x15, implicit $f12_d, implicit $x16, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit $x17, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -339,7 +339,7 @@ define i32 @caller_double_on_stack_exhausted_gprs_fprs() nounwind {
; RV32-ILP32D-NEXT: $f15_d = COPY [[C9]](s64)
; RV32-ILP32D-NEXT: $f16_d = COPY [[C10]](s64)
; RV32-ILP32D-NEXT: $f17_d = COPY [[C11]](s64)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_on_stack_exhausted_gprs_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_d, implicit $x12, implicit $x13, implicit $f11_d, implicit $x14, implicit $x15, implicit $f12_d, implicit $x16, implicit $x17, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_on_stack_exhausted_gprs_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_d, implicit $x12, implicit $x13, implicit $f11_d, implicit $x14, implicit $x15, implicit $f12_d, implicit $x16, implicit $x17, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -363,7 +363,7 @@ define i32 @caller_double_ret() nounwind {
; RV32-ILP32D-LABEL: name: caller_double_ret
; RV32-ILP32D: bb.1 (%ir-block.0):
; RV32-ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $f10_d
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $f10_d
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
; RV32-ILP32D-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
index 9443b8b2fefd86..a9c603bfdd7435 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
@@ -33,7 +33,7 @@ define i32 @caller_float_in_fpr() nounwind {
; RV32-ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32F-NEXT: $x10 = COPY [[C]](s32)
; RV32-ILP32F-NEXT: $f10_f = COPY [[C1]](s32)
- ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_fpr, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $f10_f, implicit-def $x10
+ ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_fpr, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $f10_f, implicit-def $x10
; RV32-ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
@@ -46,7 +46,7 @@ define i32 @caller_float_in_fpr() nounwind {
; RV32-ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: $x10 = COPY [[C]](s32)
; RV32-ILP32D-NEXT: $f10_f = COPY [[C1]](s32)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_fpr, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $f10_f, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_fpr, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $f10_f, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
@@ -112,7 +112,7 @@ define i32 @caller_float_in_fpr_exhausted_gprs() nounwind {
; RV32-ILP32F-NEXT: $x16 = COPY [[UV6]](s32)
; RV32-ILP32F-NEXT: $x17 = COPY [[UV7]](s32)
; RV32-ILP32F-NEXT: $f10_f = COPY [[C5]](s32)
- ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_fpr_exhausted_gprs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_f, implicit-def $x10
+ ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_fpr_exhausted_gprs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_f, implicit-def $x10
; RV32-ILP32F-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
; RV32-ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32F-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -144,7 +144,7 @@ define i32 @caller_float_in_fpr_exhausted_gprs() nounwind {
; RV32-ILP32D-NEXT: $x16 = COPY [[UV6]](s32)
; RV32-ILP32D-NEXT: $x17 = COPY [[UV7]](s32)
; RV32-ILP32D-NEXT: $f10_f = COPY [[C5]](s32)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_fpr_exhausted_gprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_f, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_fpr_exhausted_gprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_f, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -202,7 +202,7 @@ define i32 @caller_float_in_gpr_exhausted_fprs() nounwind {
; RV32-ILP32F-NEXT: $f16_f = COPY [[C6]](s32)
; RV32-ILP32F-NEXT: $f17_f = COPY [[C7]](s32)
; RV32-ILP32F-NEXT: $x10 = COPY [[C8]](s32)
- ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_gpr_exhausted_fprs, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_f, implicit $f11_f, implicit $f12_f, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit $x10, implicit-def $x10
+ ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_gpr_exhausted_fprs, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_f, implicit $f11_f, implicit $f12_f, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit $x10, implicit-def $x10
; RV32-ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
@@ -229,7 +229,7 @@ define i32 @caller_float_in_gpr_exhausted_fprs() nounwind {
; RV32-ILP32D-NEXT: $f16_f = COPY [[C6]](s32)
; RV32-ILP32D-NEXT: $f17_f = COPY [[C7]](s32)
; RV32-ILP32D-NEXT: $x10 = COPY [[C8]](s32)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_gpr_exhausted_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_f, implicit $f11_f, implicit $f12_f, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit $x10, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_gpr_exhausted_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_f, implicit $f11_f, implicit $f12_f, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit $x10, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
@@ -320,7 +320,7 @@ define i32 @caller_float_on_stack_exhausted_gprs_fprs() nounwind {
; RV32-ILP32F-NEXT: $f15_f = COPY [[C9]](s32)
; RV32-ILP32F-NEXT: $f16_f = COPY [[C10]](s32)
; RV32-ILP32F-NEXT: $f17_f = COPY [[C11]](s32)
- ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_on_stack_exhausted_gprs_fprs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_f, implicit $x12, implicit $x13, implicit $f11_f, implicit $x14, implicit $x15, implicit $f12_f, implicit $x16, implicit $x17, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit-def $x10
+ ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_on_stack_exhausted_gprs_fprs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_f, implicit $x12, implicit $x13, implicit $f11_f, implicit $x14, implicit $x15, implicit $f12_f, implicit $x16, implicit $x17, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit-def $x10
; RV32-ILP32F-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
; RV32-ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32F-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -366,7 +366,7 @@ define i32 @caller_float_on_stack_exhausted_gprs_fprs() nounwind {
; RV32-ILP32D-NEXT: $f15_f = COPY [[C9]](s32)
; RV32-ILP32D-NEXT: $f16_f = COPY [[C10]](s32)
; RV32-ILP32D-NEXT: $f17_f = COPY [[C11]](s32)
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_on_stack_exhausted_gprs_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_f, implicit $x12, implicit $x13, implicit $f11_f, implicit $x14, implicit $x15, implicit $f12_f, implicit $x16, implicit $x17, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit-def $x10
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_on_stack_exhausted_gprs_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_f, implicit $x12, implicit $x13, implicit $f11_f, implicit $x14, implicit $x15, implicit $f12_f, implicit $x16, implicit $x17, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit-def $x10
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
@@ -390,7 +390,7 @@ define i32 @caller_float_ret() nounwind {
; RV32-ILP32F-LABEL: name: caller_float_ret
; RV32-ILP32F: bb.1 (%ir-block.0):
; RV32-ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $f10_f
+ ; RV32-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $f10_f
; RV32-ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
; RV32-ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
@@ -399,7 +399,7 @@ define i32 @caller_float_ret() nounwind {
; RV32-ILP32D-LABEL: name: caller_float_ret
; RV32-ILP32D: bb.1 (%ir-block.0):
; RV32-ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $f10_f
+ ; RV32-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $f10_f
; RV32-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
; RV32-ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
index 72f523f089da4f..e4d1d3132ea45c 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
@@ -33,7 +33,7 @@ define i64 @caller_double_in_regs() nounwind {
; LP64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: $x10 = COPY [[C]](s64)
; LP64-NEXT: $x11 = COPY [[C1]](s64)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: $x10 = COPY [[COPY]](s64)
@@ -46,7 +46,7 @@ define i64 @caller_double_in_regs() nounwind {
; LP64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: $x10 = COPY [[C]](s64)
; LP64F-NEXT: $x11 = COPY [[C1]](s64)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: $x10 = COPY [[COPY]](s64)
@@ -68,7 +68,7 @@ define i64 @caller_double_ret() nounwind {
; LP64-LABEL: name: caller_double_ret
; LP64: bb.1 (%ir-block.0):
; LP64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: $x10 = COPY [[COPY]](s64)
@@ -77,7 +77,7 @@ define i64 @caller_double_ret() nounwind {
; LP64F-LABEL: name: caller_double_ret
; LP64F: bb.1 (%ir-block.0):
; LP64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: $x10 = COPY [[COPY]](s64)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
index d55c0140b831e1..b175b8d92e6c9d 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
@@ -44,7 +44,7 @@ define i64 @caller_i128_in_regs() nounwind {
; LP64-NEXT: $x10 = COPY [[C]](s64)
; LP64-NEXT: $x11 = COPY [[UV]](s64)
; LP64-NEXT: $x12 = COPY [[UV1]](s64)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i128_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @callee_i128_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: $x10 = COPY [[COPY]](s64)
@@ -59,7 +59,7 @@ define i64 @caller_i128_in_regs() nounwind {
; LP64F-NEXT: $x10 = COPY [[C]](s64)
; LP64F-NEXT: $x11 = COPY [[UV]](s64)
; LP64F-NEXT: $x12 = COPY [[UV1]](s64)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i128_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_i128_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: $x10 = COPY [[COPY]](s64)
@@ -74,7 +74,7 @@ define i64 @caller_i128_in_regs() nounwind {
; LP64D-NEXT: $x10 = COPY [[C]](s64)
; LP64D-NEXT: $x11 = COPY [[UV]](s64)
; LP64D-NEXT: $x12 = COPY [[UV1]](s64)
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i128_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @callee_i128_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64D-NEXT: $x10 = COPY [[COPY]](s64)
@@ -171,7 +171,7 @@ define i32 @caller_many_scalars() nounwind {
; LP64-NEXT: $x15 = COPY [[ANYEXT3]](s64)
; LP64-NEXT: $x16 = COPY [[ANYEXT4]](s64)
; LP64-NEXT: $x17 = COPY [[UV2]](s64)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; LP64-NEXT: ADJCALLSTACKUP 16, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
@@ -213,7 +213,7 @@ define i32 @caller_many_scalars() nounwind {
; LP64F-NEXT: $x15 = COPY [[ANYEXT3]](s64)
; LP64F-NEXT: $x16 = COPY [[ANYEXT4]](s64)
; LP64F-NEXT: $x17 = COPY [[UV2]](s64)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; LP64F-NEXT: ADJCALLSTACKUP 16, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
@@ -255,7 +255,7 @@ define i32 @caller_many_scalars() nounwind {
; LP64D-NEXT: $x15 = COPY [[ANYEXT3]](s64)
; LP64D-NEXT: $x16 = COPY [[ANYEXT4]](s64)
; LP64D-NEXT: $x17 = COPY [[UV2]](s64)
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; LP64D-NEXT: ADJCALLSTACKUP 16, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10
; LP64D-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
@@ -284,7 +284,7 @@ define i64 @caller_small_scalar_ret() nounwind {
; LP64: bb.1 (%ir-block.0):
; LP64-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 -2
; LP64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -298,7 +298,7 @@ define i64 @caller_small_scalar_ret() nounwind {
; LP64F: bb.1 (%ir-block.0):
; LP64F-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 -2
; LP64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -312,7 +312,7 @@ define i64 @caller_small_scalar_ret() nounwind {
; LP64D: bb.1 (%ir-block.0):
; LP64D-NEXT: [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 -2
; LP64D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64D-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -346,7 +346,7 @@ define i64 @caller_small_struct_ret() nounwind {
; LP64-LABEL: name: caller_small_struct_ret
; LP64: bb.1 (%ir-block.0):
; LP64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -358,7 +358,7 @@ define i64 @caller_small_struct_ret() nounwind {
; LP64F-LABEL: name: caller_small_struct_ret
; LP64F: bb.1 (%ir-block.0):
; LP64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -370,7 +370,7 @@ define i64 @caller_small_struct_ret() nounwind {
; LP64D-LABEL: name: caller_small_struct_ret
; LP64D: bb.1 (%ir-block.0):
; LP64D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64D-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
@@ -427,7 +427,7 @@ define i64 @caller_large_struct_ret() nounwind {
; LP64-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; LP64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s64) from %ir.1)
; LP64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
@@ -442,7 +442,7 @@ define i64 @caller_large_struct_ret() nounwind {
; LP64F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; LP64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s64) from %ir.1)
; LP64F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
@@ -457,7 +457,7 @@ define i64 @caller_large_struct_ret() nounwind {
; LP64D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; LP64D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s64) from %ir.1)
; LP64D-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
index 93b6747a779e3f..9283f1f090ed55 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
@@ -37,7 +37,7 @@ define i64 @caller_float_in_regs() nounwind {
; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32)
; RV64I-NEXT: $x10 = COPY [[C]](s64)
; RV64I-NEXT: $x11 = COPY [[ANYEXT]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: $x10 = COPY [[COPY]](s64)
@@ -51,7 +51,7 @@ define i64 @caller_float_in_regs() nounwind {
; RV64F-NEXT: $x10 = COPY [[C]](s64)
; RV64F-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32)
; RV64F-NEXT: $x11 = COPY [[ANYEXT]](s64)
- ; RV64F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; RV64F-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; RV64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64F-NEXT: $x10 = COPY [[COPY]](s64)
@@ -74,7 +74,7 @@ define i64 @caller_tiny_scalar_ret() nounwind {
; RV64-LABEL: name: caller_tiny_scalar_ret
; RV64: bb.1 (%ir-block.0):
; RV64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64-NEXT: PseudoCALL target-flags(riscv-plt) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV64-NEXT: PseudoCALL target-flags(riscv-call) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
index 81ff2fcadc741e..3d7ae6802fc4a1 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
@@ -30,7 +30,7 @@ define i64 @caller_double_in_regs() nounwind {
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: $x10 = COPY [[C]](s64)
; RV64I-NEXT: $f10_d = COPY [[C1]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $f10_d, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $f10_d, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: $x10 = COPY [[COPY]](s64)
@@ -96,7 +96,7 @@ define i64 @caller_double_in_fpr_exhausted_gprs() nounwind {
; RV64I-NEXT: $x16 = COPY [[UV6]](s64)
; RV64I-NEXT: $x17 = COPY [[UV7]](s64)
; RV64I-NEXT: $f10_d = COPY [[C5]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_fpr_exhausted_gprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_d, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_fpr_exhausted_gprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_d, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: $x10 = COPY [[COPY1]](s64)
@@ -155,7 +155,7 @@ define i32 @caller_double_in_gpr_exhausted_fprs() nounwind {
; RV64I-NEXT: $f16_d = COPY [[C6]](s64)
; RV64I-NEXT: $f17_d = COPY [[C7]](s64)
; RV64I-NEXT: $x10 = COPY [[C8]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_gpr_exhausted_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit $f11_d, implicit $f12_d, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit $x10, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_gpr_exhausted_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit $f11_d, implicit $f12_d, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit $x10, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
@@ -248,7 +248,7 @@ define i64 @caller_double_on_stack_exhausted_gprs_fprs() nounwind {
; RV64I-NEXT: $f15_d = COPY [[C9]](s64)
; RV64I-NEXT: $f16_d = COPY [[C10]](s64)
; RV64I-NEXT: $f17_d = COPY [[C11]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_on_stack_exhausted_gprs_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_d, implicit $x12, implicit $x13, implicit $f11_d, implicit $x14, implicit $x15, implicit $f12_d, implicit $x16, implicit $x17, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_on_stack_exhausted_gprs_fprs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $f10_d, implicit $x12, implicit $x13, implicit $f11_d, implicit $x14, implicit $x15, implicit $f12_d, implicit $x16, implicit $x17, implicit $f13_d, implicit $f14_d, implicit $f15_d, implicit $f16_d, implicit $f17_d, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: $x10 = COPY [[COPY1]](s64)
@@ -272,7 +272,7 @@ define i64 @caller_double_ret() nounwind {
; RV64I-LABEL: name: caller_double_ret
; RV64I: bb.1 (%ir-block.0):
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $f10_d
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $f10_d
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
; RV64I-NEXT: $x10 = COPY [[COPY]](s64)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
index e7e093f7110b86..b06b539ded19b9 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
@@ -11,14 +11,14 @@ define void @test_call_void_noargs() {
; RV32I-LABEL: name: test_call_void_noargs
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @void_noargs, csr_ilp32_lp64, implicit-def $x1
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @void_noargs, csr_ilp32_lp64, implicit-def $x1
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
; RV64I-LABEL: name: test_call_void_noargs
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @void_noargs, csr_ilp32_lp64, implicit-def $x1
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @void_noargs, csr_ilp32_lp64, implicit-def $x1
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -39,7 +39,7 @@ define void @test_call_void_args_i8() {
; RV32I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s8)
; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s32)
; RV32I-NEXT: $x11 = COPY [[ANYEXT1]](s32)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i8, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i8, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
@@ -52,7 +52,7 @@ define void @test_call_void_args_i8() {
; RV64I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s8)
; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)
; RV64I-NEXT: $x11 = COPY [[ANYEXT1]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i8, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i8, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -73,7 +73,7 @@ define void @test_call_void_args_i8_zext() {
; RV32I-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[C1]](s8)
; RV32I-NEXT: $x10 = COPY [[ZEXT]](s32)
; RV32I-NEXT: $x11 = COPY [[ZEXT1]](s32)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i8_zext, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i8_zext, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
@@ -86,7 +86,7 @@ define void @test_call_void_args_i8_zext() {
; RV64I-NEXT: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[C1]](s8)
; RV64I-NEXT: $x10 = COPY [[ZEXT]](s64)
; RV64I-NEXT: $x11 = COPY [[ZEXT1]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i8_zext, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i8_zext, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -107,7 +107,7 @@ define void @test_call_void_args_i16_sext() {
; RV32I-NEXT: [[SEXT1:%[0-9]+]]:_(s32) = G_SEXT [[C1]](s16)
; RV32I-NEXT: $x10 = COPY [[SEXT]](s32)
; RV32I-NEXT: $x11 = COPY [[SEXT1]](s32)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i16_sext, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i16_sext, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
@@ -120,7 +120,7 @@ define void @test_call_void_args_i16_sext() {
; RV64I-NEXT: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[C1]](s16)
; RV64I-NEXT: $x10 = COPY [[SEXT]](s64)
; RV64I-NEXT: $x11 = COPY [[SEXT1]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i16_sext, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i16_sext, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -139,7 +139,7 @@ define void @test_call_void_args_i32() {
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: $x10 = COPY [[C]](s32)
; RV32I-NEXT: $x11 = COPY [[C1]](s32)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i32, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i32, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
@@ -152,7 +152,7 @@ define void @test_call_void_args_i32() {
; RV64I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32)
; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)
; RV64I-NEXT: $x11 = COPY [[ANYEXT1]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i32, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i32, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -175,7 +175,7 @@ define void @test_call_void_args_i64() {
; RV32I-NEXT: $x11 = COPY [[UV1]](s32)
; RV32I-NEXT: $x12 = COPY [[UV2]](s32)
; RV32I-NEXT: $x13 = COPY [[UV3]](s32)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i64, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i64, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
@@ -186,7 +186,7 @@ define void @test_call_void_args_i64() {
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: $x10 = COPY [[C]](s64)
; RV64I-NEXT: $x11 = COPY [[C1]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @void_args_i64, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @void_args_i64, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -201,7 +201,7 @@ define void @test_call_i8_noargs() {
; RV32I-LABEL: name: test_call_i8_noargs
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @i8_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @i8_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
@@ -210,7 +210,7 @@ define void @test_call_i8_noargs() {
; RV64I-LABEL: name: test_call_i8_noargs
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @i8_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @i8_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)
@@ -227,7 +227,7 @@ define void @test_call_i16_noargs() {
; RV32I-LABEL: name: test_call_i16_noargs
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @i16_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @i16_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
@@ -236,7 +236,7 @@ define void @test_call_i16_noargs() {
; RV64I-LABEL: name: test_call_i16_noargs
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @i16_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @i16_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)
@@ -253,7 +253,7 @@ define void @test_call_i32_noargs() {
; RV32I-LABEL: name: test_call_i32_noargs
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @i32_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @i32_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: PseudoRET
@@ -261,7 +261,7 @@ define void @test_call_i32_noargs() {
; RV64I-LABEL: name: test_call_i32_noargs
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @i32_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @i32_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
@@ -278,7 +278,7 @@ define void @test_call_i64_noargs() {
; RV32I-LABEL: name: test_call_i64_noargs
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @i64_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @i64_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -288,7 +288,7 @@ define void @test_call_i64_noargs() {
; RV64I-LABEL: name: test_call_i64_noargs
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @i64_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @i64_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: PseudoRET
@@ -303,7 +303,7 @@ define void @test_call_ptr_noargs() {
; RV32I-LABEL: name: test_call_ptr_noargs
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @ptr_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @ptr_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
; RV32I-NEXT: PseudoRET
@@ -311,7 +311,7 @@ define void @test_call_ptr_noargs() {
; RV64I-LABEL: name: test_call_ptr_noargs
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @ptr_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @ptr_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
; RV64I-NEXT: PseudoRET
@@ -326,7 +326,7 @@ define void @test_call_i32x2_noargs() {
; RV32I-LABEL: name: test_call_i32x2_noargs
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @i32x2_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @i32x2_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -335,7 +335,7 @@ define void @test_call_i32x2_noargs() {
; RV64I-LABEL: name: test_call_i32x2_noargs
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @i32x2_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @i32x2_noargs, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
@@ -358,7 +358,7 @@ define void @test_void_byval_args() {
; RV32I-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @foo
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: $x10 = COPY [[GV]](p0)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @void_byval_args, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @void_byval_args, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
@@ -367,7 +367,7 @@ define void @test_void_byval_args() {
; RV64I-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @foo
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: $x10 = COPY [[GV]](p0)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @void_byval_args, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @void_byval_args, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -383,7 +383,7 @@ define void @test_void_sret_args() {
; RV32I-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @foo
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: $x10 = COPY [[GV]](p0)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @void_sret_args, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @void_sret_args, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
@@ -392,7 +392,7 @@ define void @test_void_sret_args() {
; RV64I-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @foo
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: $x10 = COPY [[GV]](p0)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @void_sret_args, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @void_sret_args, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -406,14 +406,14 @@ define void @test_call_external() {
; RV32I-LABEL: name: test_call_external
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @external_function, csr_ilp32_lp64, implicit-def $x1
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @external_function, csr_ilp32_lp64, implicit-def $x1
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
; RV64I-LABEL: name: test_call_external
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @external_function, csr_ilp32_lp64, implicit-def $x1
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @external_function, csr_ilp32_lp64, implicit-def $x1
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
@@ -427,14 +427,14 @@ define void @test_call_local() {
; RV32I-LABEL: name: test_call_local
; RV32I: bb.1.entry:
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @dso_local_function, csr_ilp32_lp64, implicit-def $x1
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @dso_local_function, csr_ilp32_lp64, implicit-def $x1
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoRET
;
; RV64I-LABEL: name: test_call_local
; RV64I: bb.1.entry:
; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @dso_local_function, csr_ilp32_lp64, implicit-def $x1
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @dso_local_function, csr_ilp32_lp64, implicit-def $x1
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: PseudoRET
entry:
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
index ff30ebd3a8c74e..d26b3ecff7d3a8 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
@@ -164,7 +164,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; ILP32-NEXT: [[DYN_STACKALLOC:%[0-9]+]]:_(p0) = G_DYN_STACKALLOC [[AND]](s32), 1
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: $x10 = COPY [[DYN_STACKALLOC]](p0)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: $x10 = COPY [[VAARG]](s32)
; ILP32-NEXT: PseudoRET implicit $x10
@@ -209,7 +209,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; RV32D-ILP32-NEXT: [[DYN_STACKALLOC:%[0-9]+]]:_(p0) = G_DYN_STACKALLOC [[AND]](s32), 1
; RV32D-ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32-NEXT: $x10 = COPY [[DYN_STACKALLOC]](p0)
- ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
+ ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; RV32D-ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32-NEXT: $x10 = COPY [[VAARG]](s32)
; RV32D-ILP32-NEXT: PseudoRET implicit $x10
@@ -254,7 +254,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; RV32D-ILP32F-NEXT: [[DYN_STACKALLOC:%[0-9]+]]:_(p0) = G_DYN_STACKALLOC [[AND]](s32), 1
; RV32D-ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32F-NEXT: $x10 = COPY [[DYN_STACKALLOC]](p0)
- ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
+ ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
; RV32D-ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32F-NEXT: $x10 = COPY [[VAARG]](s32)
; RV32D-ILP32F-NEXT: PseudoRET implicit $x10
@@ -299,7 +299,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; RV32D-ILP32D-NEXT: [[DYN_STACKALLOC:%[0-9]+]]:_(p0) = G_DYN_STACKALLOC [[AND]](s32), 1
; RV32D-ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32D-NEXT: $x10 = COPY [[DYN_STACKALLOC]](p0)
- ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
+ ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; RV32D-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32D-NEXT: $x10 = COPY [[VAARG]](s32)
; RV32D-ILP32D-NEXT: PseudoRET implicit $x10
@@ -345,7 +345,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; LP64-NEXT: [[DYN_STACKALLOC:%[0-9]+]]:_(p0) = G_DYN_STACKALLOC [[AND]](s64), 1
; LP64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: $x10 = COPY [[DYN_STACKALLOC]](p0)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[VAARG]](s32)
; LP64-NEXT: $x10 = COPY [[ANYEXT]](s64)
@@ -392,7 +392,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; LP64F-NEXT: [[DYN_STACKALLOC:%[0-9]+]]:_(p0) = G_DYN_STACKALLOC [[AND]](s64), 1
; LP64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: $x10 = COPY [[DYN_STACKALLOC]](p0)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[VAARG]](s32)
; LP64F-NEXT: $x10 = COPY [[ANYEXT]](s64)
@@ -439,7 +439,7 @@ define i32 @va1_va_arg_alloca(ptr %fmt, ...) nounwind {
; LP64D-NEXT: [[DYN_STACKALLOC:%[0-9]+]]:_(p0) = G_DYN_STACKALLOC [[AND]](s64), 1
; LP64D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: $x10 = COPY [[DYN_STACKALLOC]](p0)
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[VAARG]](s32)
; LP64D-NEXT: $x10 = COPY [[ANYEXT]](s64)
@@ -542,7 +542,7 @@ define void @va1_caller() nounwind {
; ILP32-NEXT: $x12 = COPY [[UV]](s32)
; ILP32-NEXT: $x13 = COPY [[UV1]](s32)
; ILP32-NEXT: $x14 = COPY [[C1]](s32)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @va1, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit $x14, implicit-def $x10
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @va1, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit $x14, implicit-def $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: PseudoRET
@@ -558,7 +558,7 @@ define void @va1_caller() nounwind {
; RV32D-ILP32-NEXT: $x12 = COPY [[UV]](s32)
; RV32D-ILP32-NEXT: $x13 = COPY [[UV1]](s32)
; RV32D-ILP32-NEXT: $x14 = COPY [[C1]](s32)
- ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @va1, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit $x14, implicit-def $x10
+ ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-call) @va1, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit $x14, implicit-def $x10
; RV32D-ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32-NEXT: PseudoRET
@@ -574,7 +574,7 @@ define void @va1_caller() nounwind {
; RV32D-ILP32F-NEXT: $x12 = COPY [[UV]](s32)
; RV32D-ILP32F-NEXT: $x13 = COPY [[UV1]](s32)
; RV32D-ILP32F-NEXT: $x14 = COPY [[C1]](s32)
- ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @va1, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit $x14, implicit-def $x10
+ ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @va1, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit $x14, implicit-def $x10
; RV32D-ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32F-NEXT: PseudoRET
@@ -590,7 +590,7 @@ define void @va1_caller() nounwind {
; RV32D-ILP32D-NEXT: $x12 = COPY [[UV]](s32)
; RV32D-ILP32D-NEXT: $x13 = COPY [[UV1]](s32)
; RV32D-ILP32D-NEXT: $x14 = COPY [[C1]](s32)
- ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @va1, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit $x14, implicit-def $x10
+ ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @va1, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit $x14, implicit-def $x10
; RV32D-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32D-NEXT: PseudoRET
@@ -605,7 +605,7 @@ define void @va1_caller() nounwind {
; LP64-NEXT: $x10 = COPY [[DEF]](p0)
; LP64-NEXT: $x11 = COPY [[C]](s64)
; LP64-NEXT: $x12 = COPY [[ANYEXT]](s64)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @va1, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @va1, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
@@ -621,7 +621,7 @@ define void @va1_caller() nounwind {
; LP64F-NEXT: $x10 = COPY [[DEF]](p0)
; LP64F-NEXT: $x11 = COPY [[C]](s64)
; LP64F-NEXT: $x12 = COPY [[ANYEXT]](s64)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @va1, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @va1, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
@@ -637,7 +637,7 @@ define void @va1_caller() nounwind {
; LP64D-NEXT: $x10 = COPY [[DEF]](p0)
; LP64D-NEXT: $x11 = COPY [[C]](s64)
; LP64D-NEXT: $x12 = COPY [[ANYEXT]](s64)
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @va1, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @va1, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64D-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
@@ -842,7 +842,7 @@ define void @va2_caller() nounwind {
; ILP32-NEXT: $x10 = COPY [[DEF]](p0)
; ILP32-NEXT: $x12 = COPY [[UV]](s32)
; ILP32-NEXT: $x13 = COPY [[UV1]](s32)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @va2, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @va2, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -858,7 +858,7 @@ define void @va2_caller() nounwind {
; RV32D-ILP32-NEXT: $x10 = COPY [[DEF]](p0)
; RV32D-ILP32-NEXT: $x12 = COPY [[UV]](s32)
; RV32D-ILP32-NEXT: $x13 = COPY [[UV1]](s32)
- ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @va2, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-call) @va2, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; RV32D-ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -874,7 +874,7 @@ define void @va2_caller() nounwind {
; RV32D-ILP32F-NEXT: $x10 = COPY [[DEF]](p0)
; RV32D-ILP32F-NEXT: $x12 = COPY [[UV]](s32)
; RV32D-ILP32F-NEXT: $x13 = COPY [[UV1]](s32)
- ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @va2, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @va2, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; RV32D-ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -890,7 +890,7 @@ define void @va2_caller() nounwind {
; RV32D-ILP32D-NEXT: $x10 = COPY [[DEF]](p0)
; RV32D-ILP32D-NEXT: $x12 = COPY [[UV]](s32)
; RV32D-ILP32D-NEXT: $x13 = COPY [[UV1]](s32)
- ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @va2, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @va2, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; RV32D-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -904,7 +904,7 @@ define void @va2_caller() nounwind {
; LP64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: $x10 = COPY [[DEF]](p0)
; LP64-NEXT: $x11 = COPY [[C]](s64)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @va2, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @va2, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: PseudoRET
@@ -916,7 +916,7 @@ define void @va2_caller() nounwind {
; LP64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: $x10 = COPY [[DEF]](p0)
; LP64F-NEXT: $x11 = COPY [[C]](s64)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @va2, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @va2, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: PseudoRET
@@ -928,7 +928,7 @@ define void @va2_caller() nounwind {
; LP64D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: $x10 = COPY [[DEF]](p0)
; LP64D-NEXT: $x11 = COPY [[C]](s64)
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @va2, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @va2, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64D-NEXT: PseudoRET
@@ -1134,7 +1134,7 @@ define void @va3_caller() nounwind {
; ILP32-NEXT: $x12 = COPY [[UV1]](s32)
; ILP32-NEXT: $x14 = COPY [[UV2]](s32)
; ILP32-NEXT: $x15 = COPY [[UV3]](s32)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @va3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x14, implicit $x15, implicit-def $x10, implicit-def $x11
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @va3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x14, implicit $x15, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -1154,7 +1154,7 @@ define void @va3_caller() nounwind {
; RV32D-ILP32-NEXT: $x12 = COPY [[UV1]](s32)
; RV32D-ILP32-NEXT: $x14 = COPY [[UV2]](s32)
; RV32D-ILP32-NEXT: $x15 = COPY [[UV3]](s32)
- ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @va3, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x14, implicit $x15, implicit-def $x10, implicit-def $x11
+ ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-call) @va3, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x14, implicit $x15, implicit-def $x10, implicit-def $x11
; RV32D-ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -1174,7 +1174,7 @@ define void @va3_caller() nounwind {
; RV32D-ILP32F-NEXT: $x12 = COPY [[UV1]](s32)
; RV32D-ILP32F-NEXT: $x14 = COPY [[UV2]](s32)
; RV32D-ILP32F-NEXT: $x15 = COPY [[UV3]](s32)
- ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @va3, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x14, implicit $x15, implicit-def $x10, implicit-def $x11
+ ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @va3, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x14, implicit $x15, implicit-def $x10, implicit-def $x11
; RV32D-ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -1194,7 +1194,7 @@ define void @va3_caller() nounwind {
; RV32D-ILP32D-NEXT: $x12 = COPY [[UV1]](s32)
; RV32D-ILP32D-NEXT: $x14 = COPY [[UV2]](s32)
; RV32D-ILP32D-NEXT: $x15 = COPY [[UV3]](s32)
- ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @va3, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x14, implicit $x15, implicit-def $x10, implicit-def $x11
+ ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @va3, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x14, implicit $x15, implicit-def $x10, implicit-def $x11
; RV32D-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32D-ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -1211,7 +1211,7 @@ define void @va3_caller() nounwind {
; LP64-NEXT: $x10 = COPY [[ANYEXT]](s64)
; LP64-NEXT: $x11 = COPY [[C1]](s64)
; LP64-NEXT: $x12 = COPY [[C2]](s64)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @va3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @va3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64-NEXT: PseudoRET
@@ -1226,7 +1226,7 @@ define void @va3_caller() nounwind {
; LP64F-NEXT: $x10 = COPY [[ANYEXT]](s64)
; LP64F-NEXT: $x11 = COPY [[C1]](s64)
; LP64F-NEXT: $x12 = COPY [[C2]](s64)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @va3, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @va3, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64F-NEXT: PseudoRET
@@ -1241,7 +1241,7 @@ define void @va3_caller() nounwind {
; LP64D-NEXT: $x10 = COPY [[ANYEXT]](s64)
; LP64D-NEXT: $x11 = COPY [[C1]](s64)
; LP64D-NEXT: $x12 = COPY [[C2]](s64)
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @va3, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @va3, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; LP64D-NEXT: PseudoRET
@@ -1288,7 +1288,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; ILP32-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (p0) from %ir.wargs)
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: $x10 = COPY [[LOAD]](p0)
- ; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[VAARG1:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
; ILP32-NEXT: [[VAARG2:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
@@ -1335,7 +1335,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; RV32D-ILP32-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (p0) from %ir.wargs)
; RV32D-ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32-NEXT: $x10 = COPY [[LOAD]](p0)
- ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
+ ; RV32D-ILP32-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; RV32D-ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32-NEXT: [[VAARG1:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
; RV32D-ILP32-NEXT: [[VAARG2:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
@@ -1382,7 +1382,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; RV32D-ILP32F-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (p0) from %ir.wargs)
; RV32D-ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32F-NEXT: $x10 = COPY [[LOAD]](p0)
- ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
+ ; RV32D-ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
; RV32D-ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32F-NEXT: [[VAARG1:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
; RV32D-ILP32F-NEXT: [[VAARG2:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
@@ -1429,7 +1429,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; RV32D-ILP32D-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (p0) from %ir.wargs)
; RV32D-ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32D-NEXT: $x10 = COPY [[LOAD]](p0)
- ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
+ ; RV32D-ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; RV32D-ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32D-ILP32D-NEXT: [[VAARG1:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
; RV32D-ILP32D-NEXT: [[VAARG2:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
@@ -1477,7 +1477,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; LP64-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (p0) from %ir.wargs, align 4)
; LP64-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: $x10 = COPY [[LOAD]](p0)
- ; LP64-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32_lp64, implicit-def $x1, implicit $x10
+ ; LP64-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; LP64-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64-NEXT: [[VAARG1:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
; LP64-NEXT: [[VAARG2:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
@@ -1526,7 +1526,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; LP64F-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (p0) from %ir.wargs, align 4)
; LP64F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: $x10 = COPY [[LOAD]](p0)
- ; LP64F-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
+ ; LP64F-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
; LP64F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64F-NEXT: [[VAARG1:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
; LP64F-NEXT: [[VAARG2:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
@@ -1575,7 +1575,7 @@ define i32 @va4_va_copy(i32 %argno, ...) nounwind {
; LP64D-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX2]](p0) :: (dereferenceable load (p0) from %ir.wargs, align 4)
; LP64D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: $x10 = COPY [[LOAD]](p0)
- ; LP64D-NEXT: PseudoCALL target-flags(riscv-plt) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
+ ; LP64D-NEXT: PseudoCALL target-flags(riscv-call) @notdead, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; LP64D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LP64D-NEXT: [[VAARG1:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
; LP64D-NEXT: [[VAARG2:%[0-9]+]]:_(s32) = G_VAARG [[FRAME_INDEX1]](p0), 4
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/variadic-call.ll b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/variadic-call.ll
index 27674ada9c288e..7c156f5f01fdf4 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/variadic-call.ll
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/variadic-call.ll
@@ -20,7 +20,7 @@ define i32 @main() {
; RV32I-NEXT: $x11 = COPY [[C1]](s32)
; RV32I-NEXT: $x12 = COPY [[C2]](s32)
; RV32I-NEXT: $x13 = COPY [[C3]](s32)
- ; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @foo, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
+ ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @foo, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: $x10 = COPY [[COPY]](s32)
@@ -40,7 +40,7 @@ define i32 @main() {
; RV64I-NEXT: $x11 = COPY [[C2]](s64)
; RV64I-NEXT: $x12 = COPY [[C3]](s64)
; RV64I-NEXT: $x13 = COPY [[C4]](s64)
- ; RV64I-NEXT: PseudoCALL target-flags(riscv-plt) @foo, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
+ ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @foo, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10
; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv32.mir
index 747d579f507086..4177a40e3826ce 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv32.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv32.mir
@@ -19,7 +19,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -63,7 +63,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -107,7 +107,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -145,7 +145,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -184,7 +184,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x12 = COPY %ylo(s32)
; CHECK-I-NEXT: $x13 = COPY [[ASHR1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -208,7 +208,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-M-NEXT: $x12 = COPY %ylo(s32)
; CHECK-M-NEXT: $x13 = COPY [[ASHR1]](s32)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -245,7 +245,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY %hi1(s32)
; CHECK-I-NEXT: $x12 = COPY %lo2(s32)
; CHECK-I-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -263,7 +263,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY %hi1(s32)
; CHECK-M-NEXT: $x12 = COPY %lo2(s32)
; CHECK-M-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -297,7 +297,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -337,7 +337,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -377,7 +377,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -413,7 +413,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -454,7 +454,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-I-NEXT: $x12 = COPY [[AND2]](s32)
; CHECK-I-NEXT: $x13 = COPY [[AND3]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -480,7 +480,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-M-NEXT: $x12 = COPY [[AND2]](s32)
; CHECK-M-NEXT: $x13 = COPY [[AND3]](s32)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -517,7 +517,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY %hi1(s32)
; CHECK-I-NEXT: $x12 = COPY %lo2(s32)
; CHECK-I-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -535,7 +535,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY %hi1(s32)
; CHECK-M-NEXT: $x12 = COPY %lo2(s32)
; CHECK-M-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
index 09bb86bac45d7e..492f9530997c93 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
@@ -19,7 +19,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -68,7 +68,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -117,7 +117,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -162,7 +162,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -197,7 +197,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -236,7 +236,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x12 = COPY %ylo(s64)
; CHECK-I-NEXT: $x13 = COPY [[ASHR1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -260,7 +260,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-M-NEXT: $x12 = COPY %ylo(s64)
; CHECK-M-NEXT: $x13 = COPY [[ASHR1]](s64)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__divti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -297,7 +297,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY %hi1(s64)
; CHECK-I-NEXT: $x12 = COPY %lo2(s64)
; CHECK-I-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__divti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -315,7 +315,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY %hi1(s64)
; CHECK-M-NEXT: $x12 = COPY %lo2(s64)
; CHECK-M-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__divti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -349,7 +349,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -392,7 +392,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -435,7 +435,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -478,7 +478,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -513,7 +513,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -554,7 +554,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-I-NEXT: $x12 = COPY [[AND2]](s64)
; CHECK-I-NEXT: $x13 = COPY [[AND3]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -580,7 +580,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-M-NEXT: $x12 = COPY [[AND2]](s64)
; CHECK-M-NEXT: $x13 = COPY [[AND3]](s64)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__udivti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__udivti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -617,7 +617,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY %hi1(s64)
; CHECK-I-NEXT: $x12 = COPY %lo2(s64)
; CHECK-I-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__udivti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -635,7 +635,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY %hi1(s64)
; CHECK-M-NEXT: $x12 = COPY %lo2(s64)
; CHECK-M-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__udivti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__udivti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ceil-floor.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ceil-floor.mir
index 956989480c5ba0..1e184bd0c1120f 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ceil-floor.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ceil-floor.mir
@@ -16,7 +16,7 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $f10_f = COPY [[COPY]](s32)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &ceilf, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_f, implicit-def $f10_f
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &ceilf, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_f, implicit-def $f10_f
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f
; CHECK-NEXT: $f10_f = COPY [[COPY1]](s32)
@@ -39,7 +39,7 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $f10_f = COPY [[COPY]](s32)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &floorf, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_f, implicit-def $f10_f
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &floorf, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_f, implicit-def $f10_f
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f
; CHECK-NEXT: $f10_f = COPY [[COPY1]](s32)
@@ -62,7 +62,7 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $f10_d = COPY [[COPY]](s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &ceil, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit-def $f10_d
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &ceil, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit-def $f10_d
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $f10_d
; CHECK-NEXT: $f10_d = COPY [[COPY1]](s64)
@@ -85,7 +85,7 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $f10_d = COPY [[COPY]](s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &floor, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit-def $f10_d
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &floor, csr_ilp32d_lp64d, implicit-def $x1, implicit $f10_d, implicit-def $f10_d
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $f10_d
; CHECK-NEXT: $f10_d = COPY [[COPY1]](s64)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv32.mir
index 617471313356fd..1af5b686a5267f 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv32.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv32.mir
@@ -11,7 +11,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s32)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -36,7 +36,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s32)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -61,7 +61,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s32)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -86,7 +86,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s32)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -112,7 +112,7 @@ body: |
; CHECK-NEXT: $x11 = COPY %hi1(s32)
; CHECK-NEXT: $x12 = COPY %lo2(s32)
; CHECK-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -148,7 +148,7 @@ body: |
; CHECK-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-NEXT: $x12 = COPY [[COPY1]](s32)
; CHECK-NEXT: $x13 = COPY [[ASHR1]](s32)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: $x10 = COPY [[COPY2]](s32)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv64.mir
index fb41ee5bafc621..478a652dbf82b6 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv64.mir
@@ -11,7 +11,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -36,7 +36,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -61,7 +61,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -86,7 +86,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -111,7 +111,7 @@ body: |
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -137,7 +137,7 @@ body: |
; CHECK-NEXT: $x11 = COPY %hi1(s64)
; CHECK-NEXT: $x12 = COPY %lo2(s64)
; CHECK-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__multi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__multi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -173,7 +173,7 @@ body: |
; CHECK-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-NEXT: $x12 = COPY [[COPY1]](s64)
; CHECK-NEXT: $x13 = COPY [[ASHR1]](s64)
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) &__multi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__multi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: $x10 = COPY [[COPY2]](s64)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir
index d0929fd19eb92a..2e46893b8cf979 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir
@@ -46,7 +46,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[ASHR]](s32)
; LIBCALL-NEXT: $x11 = COPY [[ASHR1]](s32)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
@@ -108,7 +108,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[ASHR]](s32)
; LIBCALL-NEXT: $x11 = COPY [[ASHR1]](s32)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
@@ -164,7 +164,7 @@ body: |
; LIBCALL-NEXT: $x11 = COPY [[ASHR]](s32)
; LIBCALL-NEXT: $x12 = COPY [[COPY1]](s32)
; LIBCALL-NEXT: $x13 = COPY [[ASHR1]](s32)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; LIBCALL-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x11
@@ -222,7 +222,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[AND]](s32)
; LIBCALL-NEXT: $x11 = COPY [[AND1]](s32)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
@@ -278,7 +278,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[AND]](s32)
; LIBCALL-NEXT: $x11 = COPY [[AND1]](s32)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__mulsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
@@ -330,7 +330,7 @@ body: |
; LIBCALL-NEXT: $x11 = COPY [[C]](s32)
; LIBCALL-NEXT: $x12 = COPY [[COPY1]](s32)
; LIBCALL-NEXT: $x13 = COPY [[C1]](s32)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; LIBCALL-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x11
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir
index c2bf9ff2a61e9a..29f4458d5f7fed 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir
@@ -46,7 +46,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[ASHR]](s64)
; LIBCALL-NEXT: $x11 = COPY [[ASHR1]](s64)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 56
@@ -108,7 +108,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[ASHR]](s64)
; LIBCALL-NEXT: $x11 = COPY [[ASHR1]](s64)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
@@ -160,7 +160,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[SEXT_INREG]](s64)
; LIBCALL-NEXT: $x11 = COPY [[SEXT_INREG1]](s64)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; LIBCALL-NEXT: [[SEXT_INREG2:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY2]], 32
@@ -214,7 +214,7 @@ body: |
; LIBCALL-NEXT: $x11 = COPY [[ASHR]](s64)
; LIBCALL-NEXT: $x12 = COPY [[COPY1]](s64)
; LIBCALL-NEXT: $x13 = COPY [[ASHR1]](s64)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__multi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__multi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; LIBCALL-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x11
@@ -272,7 +272,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[AND]](s64)
; LIBCALL-NEXT: $x11 = COPY [[AND1]](s64)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
@@ -328,7 +328,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[AND]](s64)
; LIBCALL-NEXT: $x11 = COPY [[AND1]](s64)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
@@ -384,7 +384,7 @@ body: |
; LIBCALL-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: $x10 = COPY [[AND]](s64)
; LIBCALL-NEXT: $x11 = COPY [[AND1]](s64)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
@@ -436,7 +436,7 @@ body: |
; LIBCALL-NEXT: $x11 = COPY [[C]](s64)
; LIBCALL-NEXT: $x12 = COPY [[COPY1]](s64)
; LIBCALL-NEXT: $x13 = COPY [[C1]](s64)
- ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-plt) &__multi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; LIBCALL-NEXT: PseudoCALL target-flags(riscv-call) &__multi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; LIBCALL-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x11
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv32.mir
index cb7f0eaea59b6c..99ca07d954ffc0 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv32.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv32.mir
@@ -19,7 +19,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -63,7 +63,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -107,7 +107,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -145,7 +145,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -184,7 +184,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-I-NEXT: $x12 = COPY %ylo(s32)
; CHECK-I-NEXT: $x13 = COPY [[ASHR1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -208,7 +208,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY [[ASHR]](s32)
; CHECK-M-NEXT: $x12 = COPY %ylo(s32)
; CHECK-M-NEXT: $x13 = COPY [[ASHR1]](s32)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -245,7 +245,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY %hi1(s32)
; CHECK-I-NEXT: $x12 = COPY %lo2(s32)
; CHECK-I-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -263,7 +263,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY %hi1(s32)
; CHECK-M-NEXT: $x12 = COPY %lo2(s32)
; CHECK-M-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -297,7 +297,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -337,7 +337,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -377,7 +377,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -413,7 +413,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s32)
@@ -454,7 +454,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-I-NEXT: $x12 = COPY [[AND2]](s32)
; CHECK-I-NEXT: $x13 = COPY [[AND3]](s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -480,7 +480,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-M-NEXT: $x12 = COPY [[AND2]](s32)
; CHECK-M-NEXT: $x13 = COPY [[AND3]](s32)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -517,7 +517,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY %hi1(s32)
; CHECK-I-NEXT: $x12 = COPY %lo2(s32)
; CHECK-I-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -535,7 +535,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY %hi1(s32)
; CHECK-M-NEXT: $x12 = COPY %lo2(s32)
; CHECK-M-NEXT: $x13 = COPY %hi2(s32)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir
index fb008bae902425..64458c40f44643 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir
@@ -19,7 +19,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -68,7 +68,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -117,7 +117,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x11 = COPY [[ASHR1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -162,7 +162,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[SEXT_INREG]](s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -197,7 +197,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -236,7 +236,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-I-NEXT: $x12 = COPY %ylo(s64)
; CHECK-I-NEXT: $x13 = COPY [[ASHR1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__modti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -260,7 +260,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY [[ASHR]](s64)
; CHECK-M-NEXT: $x12 = COPY %ylo(s64)
; CHECK-M-NEXT: $x13 = COPY [[ASHR1]](s64)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__modti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -297,7 +297,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY %hi1(s64)
; CHECK-I-NEXT: $x12 = COPY %lo2(s64)
; CHECK-I-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__modti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -315,7 +315,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY %hi1(s64)
; CHECK-M-NEXT: $x12 = COPY %lo2(s64)
; CHECK-M-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__modti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -349,7 +349,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -392,7 +392,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -435,7 +435,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -478,7 +478,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -513,7 +513,7 @@ body: |
; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: $x10 = COPY [[COPY2]](s64)
@@ -554,7 +554,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-I-NEXT: $x12 = COPY [[AND2]](s64)
; CHECK-I-NEXT: $x13 = COPY [[AND3]](s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umodti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umodti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -580,7 +580,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-M-NEXT: $x12 = COPY [[AND2]](s64)
; CHECK-M-NEXT: $x13 = COPY [[AND3]](s64)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__umodti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__umodti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -617,7 +617,7 @@ body: |
; CHECK-I-NEXT: $x11 = COPY %hi1(s64)
; CHECK-I-NEXT: $x12 = COPY %lo2(s64)
; CHECK-I-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-plt) &__umodti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umodti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -635,7 +635,7 @@ body: |
; CHECK-M-NEXT: $x11 = COPY %hi1(s64)
; CHECK-M-NEXT: $x12 = COPY %lo2(s64)
; CHECK-M-NEXT: $x13 = COPY %hi2(s64)
- ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-plt) &__umodti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
+ ; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__umodti3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
diff --git a/llvm/test/CodeGen/RISCV/float-select-verify.ll b/llvm/test/CodeGen/RISCV/float-select-verify.ll
index b38560fa413647..cf1a2a89229dbd 100644
--- a/llvm/test/CodeGen/RISCV/float-select-verify.ll
+++ b/llvm/test/CodeGen/RISCV/float-select-verify.ll
@@ -67,11 +67,11 @@ define dso_local void @buz(i1 %pred, float %a, float %b) {
; CHECK-NEXT: [[FMV_X_W:%[0-9]+]]:gpr = FMV_X_W killed [[PHI1]]
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[FMV_X_W]]
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) @bar, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @bar, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
; CHECK-NEXT: $x10 = COPY [[FCVT_L_S]]
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) @foo, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @foo, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
; CHECK-NEXT: PseudoRET
entry:
diff --git a/llvm/test/CodeGen/RISCV/live-sp.mir b/llvm/test/CodeGen/RISCV/live-sp.mir
index 5df6a79755cb46..df72b1ddfebc5e 100644
--- a/llvm/test/CodeGen/RISCV/live-sp.mir
+++ b/llvm/test/CodeGen/RISCV/live-sp.mir
@@ -79,7 +79,7 @@ body: |
; CHECK-NEXT: SW renamable $x1, $x2, 4 :: (store (s32) into %ir.a)
; CHECK-NEXT: renamable $x11 = ADDIW killed renamable $x1, 0
; CHECK-NEXT: $x10 = COPY $x0
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) @vararg, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit $x11, implicit-def $x2
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @vararg, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit $x11, implicit-def $x2
; CHECK-NEXT: $x1 = LD $x2, 8 :: (load (s64) from %stack.1)
; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 16
; CHECK-NEXT: PseudoRET
@@ -87,7 +87,7 @@ body: |
renamable $x11 = ADDIW killed renamable $x1, 0
ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
$x10 = COPY $x0
- PseudoCALL target-flags(riscv-plt) @vararg, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit $x11, implicit-def $x2
+ PseudoCALL target-flags(riscv-call) @vararg, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit $x11, implicit-def $x2
ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
PseudoRET
diff --git a/llvm/test/CodeGen/RISCV/make-compressible.mir b/llvm/test/CodeGen/RISCV/make-compressible.mir
index e526b131a01793..91c2d95b5051d7 100644
--- a/llvm/test/CodeGen/RISCV/make-compressible.mir
+++ b/llvm/test/CodeGen/RISCV/make-compressible.mir
@@ -550,18 +550,18 @@ body: |
; RV32-NEXT: renamable $f10_f = FLW $x10, 0 :: (load (s32) from %ir.g)
; RV32-NEXT: renamable $f11_f = FLW $x10, 4 :: (load (s32) from %ir.arrayidx1)
; RV32-NEXT: renamable $f12_f = FLW killed $x10, 8 :: (load (s32) from %ir.arrayidx2)
- ; RV32-NEXT: PseudoTAIL target-flags(riscv-plt) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
+ ; RV32-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
; RV64-LABEL: name: load_common_ptr_float
; RV64: liveins: $x16
; RV64-NEXT: {{ $}}
; RV64-NEXT: renamable $f10_f = FLW renamable $x16, 0 :: (load (s32) from %ir.g)
; RV64-NEXT: renamable $f11_f = FLW renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
; RV64-NEXT: renamable $f12_f = FLW killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
- ; RV64-NEXT: PseudoTAIL target-flags(riscv-plt) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
+ ; RV64-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
renamable $f10_f = FLW renamable $x16, 0 :: (load (s32) from %ir.g)
renamable $f11_f = FLW renamable $x16, 4 :: (load (s32) from %ir.arrayidx1)
renamable $f12_f = FLW killed renamable $x16, 8 :: (load (s32) from %ir.arrayidx2)
- PseudoTAIL target-flags(riscv-plt) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
+ PseudoTAIL target-flags(riscv-call) @load_common_ptr_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
...
---
@@ -578,7 +578,7 @@ body: |
; RV32-NEXT: renamable $f10_d = FLD $x10, 0 :: (load (s64) from %ir.g)
; RV32-NEXT: renamable $f11_d = FLD $x10, 8 :: (load (s64) from %ir.arrayidx1)
; RV32-NEXT: renamable $f12_d = FLD killed $x10, 16 :: (load (s64) from %ir.arrayidx2)
- ; RV32-NEXT: PseudoTAIL target-flags(riscv-plt) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
+ ; RV32-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
; RV64-LABEL: name: load_common_ptr_double
; RV64: liveins: $x16
; RV64-NEXT: {{ $}}
@@ -586,11 +586,11 @@ body: |
; RV64-NEXT: renamable $f10_d = FLD $x10, 0 :: (load (s64) from %ir.g)
; RV64-NEXT: renamable $f11_d = FLD $x10, 8 :: (load (s64) from %ir.arrayidx1)
; RV64-NEXT: renamable $f12_d = FLD killed $x10, 16 :: (load (s64) from %ir.arrayidx2)
- ; RV64-NEXT: PseudoTAIL target-flags(riscv-plt) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
+ ; RV64-NEXT: PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
renamable $f10_d = FLD renamable $x16, 0 :: (load (s64) from %ir.g)
renamable $f11_d = FLD renamable $x16, 8 :: (load (s64) from %ir.arrayidx1)
renamable $f12_d = FLD killed renamable $x16, 16 :: (load (s64) from %ir.arrayidx2)
- PseudoTAIL target-flags(riscv-plt) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
+ PseudoTAIL target-flags(riscv-call) @load_common_ptr_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
...
---
@@ -746,18 +746,18 @@ body: |
; RV32-NEXT: renamable $f10_f = FLW $x11, 16 :: (load (s32) from %ir.arrayidx)
; RV32-NEXT: renamable $f11_f = FLW $x11, 20 :: (load (s32) from %ir.arrayidx1)
; RV32-NEXT: renamable $f12_f = FLW killed $x11, 24 :: (load (s32) from %ir.arrayidx2)
- ; RV32-NEXT: PseudoTAIL target-flags(riscv-plt) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
+ ; RV32-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
; RV64-LABEL: name: load_large_offset_float
; RV64: liveins: $x10
; RV64-NEXT: {{ $}}
; RV64-NEXT: renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
; RV64-NEXT: renamable $f11_f = FLW renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
; RV64-NEXT: renamable $f12_f = FLW killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
- ; RV64-NEXT: PseudoTAIL target-flags(riscv-plt) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
+ ; RV64-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
renamable $f10_f = FLW renamable $x10, 400 :: (load (s32) from %ir.arrayidx)
renamable $f11_f = FLW renamable $x10, 404 :: (load (s32) from %ir.arrayidx1)
renamable $f12_f = FLW killed renamable $x10, 408 :: (load (s32) from %ir.arrayidx2)
- PseudoTAIL target-flags(riscv-plt) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
+ PseudoTAIL target-flags(riscv-call) @load_large_offset_float_1, implicit $x2, implicit $f10_f, implicit $f11_f, implicit $f12_f
...
---
@@ -774,7 +774,7 @@ body: |
; RV32-NEXT: renamable $f10_d = FLD $x11, 32 :: (load (s64) from %ir.arrayidx)
; RV32-NEXT: renamable $f11_d = FLD $x11, 40 :: (load (s64) from %ir.arrayidx1)
; RV32-NEXT: renamable $f12_d = FLD killed $x11, 48 :: (load (s64) from %ir.arrayidx2)
- ; RV32-NEXT: PseudoTAIL target-flags(riscv-plt) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
+ ; RV32-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
; RV64-LABEL: name: load_large_offset_double
; RV64: liveins: $x10
; RV64-NEXT: {{ $}}
@@ -782,11 +782,11 @@ body: |
; RV64-NEXT: renamable $f10_d = FLD $x11, 32 :: (load (s64) from %ir.arrayidx)
; RV64-NEXT: renamable $f11_d = FLD $x11, 40 :: (load (s64) from %ir.arrayidx1)
; RV64-NEXT: renamable $f12_d = FLD killed $x11, 48 :: (load (s64) from %ir.arrayidx2)
- ; RV64-NEXT: PseudoTAIL target-flags(riscv-plt) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
+ ; RV64-NEXT: PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
renamable $f10_d = FLD renamable $x10, 800 :: (load (s64) from %ir.arrayidx)
renamable $f11_d = FLD renamable $x10, 808 :: (load (s64) from %ir.arrayidx1)
renamable $f12_d = FLD killed renamable $x10, 816 :: (load (s64) from %ir.arrayidx2)
- PseudoTAIL target-flags(riscv-plt) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
+ PseudoTAIL target-flags(riscv-call) @load_large_offset_double_1, implicit $x2, implicit $f10_d, implicit $f11_d, implicit $f12_d
...
---
diff --git a/llvm/test/CodeGen/RISCV/mir-target-flags.ll b/llvm/test/CodeGen/RISCV/mir-target-flags.ll
index c4c6a1435732e5..fdc0d894b2cae1 100644
--- a/llvm/test/CodeGen/RISCV/mir-target-flags.ll
+++ b/llvm/test/CodeGen/RISCV/mir-target-flags.ll
@@ -35,7 +35,7 @@ define i32 @caller(i32 %a) nounwind {
; RV32-SMALL: target-flags(riscv-tprel-hi) @t_le
; RV32-SMALL-NEXT: target-flags(riscv-tprel-add) @t_le
; RV32-SMALL-NEXT: target-flags(riscv-tprel-lo) @t_le
-; RV32-SMALL: target-flags(riscv-plt) @callee
+; RV32-SMALL: target-flags(riscv-call) @callee
;
; RV32-MED-LABEL: name: caller
; RV32-MED: target-flags(riscv-got-hi) @g_e
@@ -44,16 +44,16 @@ define i32 @caller(i32 %a) nounwind {
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1>
; RV32-MED: target-flags(riscv-tls-gd-hi) @t_un
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi2>
-; RV32-MED: target-flags(riscv-plt) &__tls_get_addr
+; RV32-MED: target-flags(riscv-call) &__tls_get_addr
; RV32-MED: target-flags(riscv-tls-gd-hi) @t_ld
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi3>
-; RV32-MED: target-flags(riscv-plt) &__tls_get_addr
+; RV32-MED: target-flags(riscv-call) &__tls_get_addr
; RV32-MED: target-flags(riscv-tls-got-hi) @t_ie
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi4>
; RV32-MED: target-flags(riscv-tprel-hi) @t_le
; RV32-MED-NEXT: target-flags(riscv-tprel-add) @t_le
; RV32-MED-NEXT: target-flags(riscv-tprel-lo) @t_le
-; RV32-MED: target-flags(riscv-plt) @callee
+; RV32-MED: target-flags(riscv-call) @callee
;
%b = load i32, ptr @g_e
%c = load i32, ptr @g_i
diff --git a/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir b/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
index 19ad7b16e386ea..7c6253b897ffd1 100644
--- a/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
+++ b/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
@@ -76,7 +76,7 @@ body: |
; we have to allocate a virtual register to compute it.
; A later run of the the register scavenger won't find an available register
; either so it will have to spill one to the emergency spill slot.
- PseudoCALL target-flags(riscv-plt) @foo, csr_ilp32_lp64, implicit-def $x1, implicit-def $x2, implicit $x1, implicit $x5, implicit $x6, implicit $x7, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $x28, implicit $x29, implicit $x30, implicit $x31
+ PseudoCALL target-flags(riscv-call) @foo, csr_ilp32_lp64, implicit-def $x1, implicit-def $x2, implicit $x1, implicit $x5, implicit $x6, implicit $x7, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $x28, implicit $x29, implicit $x30, implicit $x31
PseudoRET
...
diff --git a/llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir b/llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
index f807c7693332a8..83fc1fc994cfab 100644
--- a/llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
@@ -53,7 +53,7 @@ body: |
bb.0 (%ir-block.0):
ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
$x10 = ADDI %stack.0.local0, 0
- PseudoCALL target-flags(riscv-plt) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ PseudoCALL target-flags(riscv-call) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
PseudoRET
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
index 0403ceda8f11c0..5fbfbc9f37ce5a 100644
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
@@ -55,6 +55,6 @@ body: |
; we have to allocate a virtual register to compute it.
; A later run of the the register scavenger won't find an available register
; either so it will have to spill one to the emergency spill slot.
- PseudoCALL target-flags(riscv-plt) @fixedlen_vector_spillslot, csr_ilp32_lp64, implicit-def $x1, implicit-def $x2, implicit $x1, implicit $x5, implicit $x6, implicit $x7, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $x28, implicit $x29, implicit $x30, implicit $x31
+ PseudoCALL target-flags(riscv-call) @fixedlen_vector_spillslot, csr_ilp32_lp64, implicit-def $x1, implicit-def $x2, implicit $x1, implicit $x5, implicit $x6, implicit $x7, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $x28, implicit $x29, implicit $x30, implicit $x31
PseudoRET
...
diff --git a/llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir b/llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
index bf78329c261fac..b4d8805b65bd8f 100644
--- a/llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
@@ -87,6 +87,6 @@ body: |
; A later run of the the register scavenger won't find available registers
; either so it will have to spill two to the emergency spill slots
; required for this RVV computation.
- PseudoCALL target-flags(riscv-plt) @spillslot, csr_ilp32_lp64, implicit-def $x1, implicit-def $x2, implicit $x1, implicit $x5, implicit $x6, implicit $x7, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $x28, implicit $x29, implicit $x30, implicit $x31
+ PseudoCALL target-flags(riscv-call) @spillslot, csr_ilp32_lp64, implicit-def $x1, implicit-def $x2, implicit $x1, implicit $x5, implicit $x6, implicit $x7, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $x28, implicit $x29, implicit $x30, implicit $x31
PseudoRET
...
diff --git a/llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir b/llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
index b8a922a9fb1a00..d98e18b22f6921 100644
--- a/llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
@@ -188,7 +188,7 @@ body: |
$x10 = ADDI %stack.0.a, 0
$x11 = ADDI %stack.1.b, 0
$x12 = ADDI %stack.2.c, 0
- PseudoCALL target-flags(riscv-plt) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ PseudoCALL target-flags(riscv-call) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
PseudoRET
@@ -233,7 +233,7 @@ body: |
$x10 = ADDI %stack.0.a, 0
$x11 = ADDI %stack.1.b, 0
$x12 = ADDI %stack.2.c, 0
- PseudoCALL target-flags(riscv-plt) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ PseudoCALL target-flags(riscv-call) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
PseudoRET
@@ -278,7 +278,7 @@ body: |
$x10 = ADDI %stack.0.a, 0
$x11 = ADDI %stack.1.b, 0
$x12 = ADDI %stack.2.c, 0
- PseudoCALL target-flags(riscv-plt) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ PseudoCALL target-flags(riscv-call) @extern, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
PseudoRET
diff --git a/llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir b/llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
index 6d05a8e62ea110..e629727d26c35c 100644
--- a/llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
@@ -189,7 +189,7 @@ body: |
; CHECK-NEXT: renamable $v8 = VL1RE8_V killed $x10 :: (load unknown-size from %stack.1, align 8)
; CHECK-NEXT: PseudoVSE8_V_MF8 killed renamable $v8, renamable $x8, 2, 3 /* e8 */, implicit $vl, implicit $vtype :: (store (s16) into %ir.0, align 1)
; CHECK-NEXT: $x10 = COPY renamable $x9
- ; CHECK-NEXT: PseudoCALL target-flags(riscv-plt) @fprintf, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2, implicit-def dead $x10
+ ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) @fprintf, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2, implicit-def dead $x10
; CHECK-NEXT: PseudoBR %bb.1
bb.0.entry:
successors: %bb.1(0x80000000)
@@ -219,7 +219,7 @@ body: |
PseudoVSE8_V_MF8 killed renamable $v8, renamable $x8, 2, 3, implicit $vl, implicit $vtype :: (store (s16) into %ir.0, align 1)
ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
$x10 = COPY renamable $x9
- PseudoCALL target-flags(riscv-plt) @fprintf, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2, implicit-def dead $x10
+ PseudoCALL target-flags(riscv-call) @fprintf, csr_ilp32d_lp64d, implicit-def dead $x1, implicit killed $x10, implicit-def $x2, implicit-def dead $x10
ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
PseudoBR %bb.1
diff --git a/llvm/test/CodeGen/RISCV/vector-abi.ll b/llvm/test/CodeGen/RISCV/vector-abi.ll
index ad371a447438fd..9e786e576fcbd9 100644
--- a/llvm/test/CodeGen/RISCV/vector-abi.ll
+++ b/llvm/test/CodeGen/RISCV/vector-abi.ll
@@ -21,7 +21,7 @@ define void @caller() {
; RV32: SW killed [[ADDI3]], %stack.0, 0 :: (store (s32) into %stack.0)
; RV32: [[ADDI4:%[0-9]+]]:gpr = ADDI %stack.0, 0
; RV32: $x10 = COPY [[ADDI4]]
- ; RV32: PseudoCALL target-flags(riscv-plt) @callee, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
+ ; RV32: PseudoCALL target-flags(riscv-call) @callee, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
; RV32: ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
; RV32: PseudoRET
; RV64-LABEL: name: caller
@@ -41,7 +41,7 @@ define void @caller() {
; RV64: SD killed [[ADDI3]], %stack.0, 0 :: (store (s64) into %stack.0)
; RV64: [[ADDI4:%[0-9]+]]:gpr = ADDI %stack.0, 0
; RV64: $x10 = COPY [[ADDI4]]
- ; RV64: PseudoCALL target-flags(riscv-plt) @callee, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
+ ; RV64: PseudoCALL target-flags(riscv-call) @callee, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2
; RV64: ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
; RV64: PseudoRET
call void @callee(<4 x i8> <i8 4, i8 5, i8 6, i8 7>)
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