[llvm] [AArch64][SVE2] Generate XAR (PR #77160)

[Paul Walker via llvm-commits]

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@@ -454,6 +454,15 @@ def AArch64eor3 : PatFrags<(ops node:$op1, node:$op2, node:$op3),
                            [(int_aarch64_sve_eor3 node:$op1, node:$op2, node:$op3),
                             (xor node:$op1, (xor node:$op2, node:$op3))]>;
 
+def SDT_AArch64xar_Imm : SDTypeProfile<1, 3, [
+  SDTCisVec<0>, SDTCisVec<1>, SDTCisVec<2>, SDTCisInt<3>,
+  SDTCisSameAs<0,1>, SDTCisSameAs<1,2>]>;
+def AArch64xar_node : SDNode<"AArch64ISD::XAR_I",  SDT_AArch64xar_Imm>;
+def AArch64xar : PatFrags<(ops node:$op1, node:$op2, node:$op3),
+                           [(int_aarch64_sve_xar node:$op1, node:$op2, node:$op3),
+                            (AArch64xar_node node:$op1, node:$op2, node:$op3)]>;
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paulwalker-arm wrote:

Since you're creating `XAR_I` to match the exact behaviour of the instruction we'd then typically extend `performIntrinsicCombine` to lower `int_aarch64_sve_xar` to `XAR_I` so that future combines catch the most cases and then you'll not need a PatFrags. 

https://github.com/llvm/llvm-project/pull/77160