[llvm] [RISCV] fold trunc_vl (srl_vl (vwaddu X, Y), splat 1) -> vaaddu X, Y (PR #76550)

via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 28 19:01:58 PST 2023


sun-jacobi wrote:

> I don't think this is the right way to do this. We should make ISD::AVGFLOORU Custom for RISC-V and let DAGCombiner create an ISD::AVGFLOORU node that we can custom lower to a new RISCVISD::VAADDU_VL opcode.

Thank you for the advice, I will try this way. 

https://github.com/llvm/llvm-project/pull/76550


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