[llvm] [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR instructions (PR #76319)

[Shengchen Kan via llvm-commits]

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@@ -1073,16 +1077,21 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     //  MemAddr, src1(VEX_4V), src2(ModR/M)
     //  MemAddr, src1(ModR/M), imm8
     //
+    // NDD:
+    // dst(VEX_4V), MemAddr, src1(ModR/M)
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KanRobert wrote:

Indentation is done.

https://github.com/llvm/llvm-project/pull/76319