[llvm] [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR instructions (PR #76319)

[Shengchen Kan via llvm-commits]

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@@ -992,6 +995,12 @@ inline unsigned getOperandBias(const MCInstrDesc &Desc) {
   }
 }
 
+/// \returns true if the instruction has a NDD (new data destination).
+inline bool isND(uint64_t TSFlags) {
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KanRobert wrote:

Done

https://github.com/llvm/llvm-project/pull/76319